1*aeb901f2SHongbo Zhang/* 2*aeb901f2SHongbo Zhang * Copyright 2016 NXP Semiconductor. 3*aeb901f2SHongbo Zhang * Author: Wang Dongsheng <dongsheng.wang@freescale.com> 4*aeb901f2SHongbo Zhang * 5*aeb901f2SHongbo Zhang * SPDX-License-Identifier: GPL-2.0+ 6*aeb901f2SHongbo Zhang */ 7*aeb901f2SHongbo Zhang 8*aeb901f2SHongbo Zhang#include <config.h> 9*aeb901f2SHongbo Zhang#include <linux/linkage.h> 10*aeb901f2SHongbo Zhang 11*aeb901f2SHongbo Zhang#include <asm/armv7.h> 12*aeb901f2SHongbo Zhang#include <asm/psci.h> 13*aeb901f2SHongbo Zhang 14*aeb901f2SHongbo Zhang .pushsection ._secure.text, "ax" 15*aeb901f2SHongbo Zhang 16*aeb901f2SHongbo Zhang .arch_extension sec 17*aeb901f2SHongbo Zhang 18*aeb901f2SHongbo Zhang .align 5 19*aeb901f2SHongbo Zhang 20*aeb901f2SHongbo Zhang.globl psci_system_off 21*aeb901f2SHongbo Zhangpsci_system_off: 22*aeb901f2SHongbo Zhang @ Get QIXIS base address 23*aeb901f2SHongbo Zhang movw r1, #(QIXIS_BASE & 0xffff) 24*aeb901f2SHongbo Zhang movt r1, #(QIXIS_BASE >> 16) 25*aeb901f2SHongbo Zhang 26*aeb901f2SHongbo Zhang ldrb r2, [r1, #QIXIS_PWR_CTL] 27*aeb901f2SHongbo Zhang orr r2, r2, #QIXIS_PWR_CTL_POWEROFF 28*aeb901f2SHongbo Zhang strb r2, [r1, #QIXIS_PWR_CTL] 29*aeb901f2SHongbo Zhang 30*aeb901f2SHongbo Zhang1: wfi 31*aeb901f2SHongbo Zhang b 1b 32*aeb901f2SHongbo Zhang 33*aeb901f2SHongbo Zhang .popsection 34