13ad2737eSYing Zhang /* 23ad2737eSYing Zhang * Copyright 2014 Freescale Semiconductor, Inc. 33ad2737eSYing Zhang * 43ad2737eSYing Zhang * SPDX-License-Identifier: GPL-2.0+ 53ad2737eSYing Zhang */ 63ad2737eSYing Zhang 73ad2737eSYing Zhang #ifndef __VID_H_ 83ad2737eSYing Zhang #define __VID_H_ 93ad2737eSYing Zhang 103ad2737eSYing Zhang #define IR36021_LOOP1_MANUAL_ID_OFFSET 0x6A 113ad2737eSYing Zhang #define IR36021_LOOP1_VOUT_OFFSET 0x9A 123ad2737eSYing Zhang #define IR36021_MFR_ID_OFFSET 0x92 133ad2737eSYing Zhang #define IR36021_MFR_ID 0x43 14*cabe4d2fSYing Zhang #define IR36021_INTEL_MODE_OOFSET 0x14 15*cabe4d2fSYing Zhang #define IR36021_MODE_MASK 0x20 16*cabe4d2fSYing Zhang #define IR36021_INTEL_MODE 0x00 17*cabe4d2fSYing Zhang #define IR36021_AMD_MODE 0x20 183ad2737eSYing Zhang 193ad2737eSYing Zhang /* step the IR regulator in 5mV increments */ 203ad2737eSYing Zhang #define IR_VDD_STEP_DOWN 5 213ad2737eSYing Zhang #define IR_VDD_STEP_UP 5 223ad2737eSYing Zhang int adjust_vdd(ulong vdd_override); 233ad2737eSYing Zhang 243ad2737eSYing Zhang #endif /* __VID_H_ */ 25