xref: /rk3399_rockchip-uboot/board/freescale/b4860qds/law.c (revision 272a1acf1ef574356e5da51f7d6b3b07ab4e9b83)
1b5b06fb7SYork Sun /*
2b5b06fb7SYork Sun  * Copyright 2011-2012 Freescale Semiconductor, Inc.
3b5b06fb7SYork Sun  *
4*1a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
5b5b06fb7SYork Sun  */
6b5b06fb7SYork Sun 
7b5b06fb7SYork Sun #include <common.h>
8b5b06fb7SYork Sun #include <asm/fsl_law.h>
9b5b06fb7SYork Sun #include <asm/mmu.h>
10b5b06fb7SYork Sun 
11b5b06fb7SYork Sun struct law_entry law_table[] = {
12b5b06fb7SYork Sun 	SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
13b5b06fb7SYork Sun #ifdef CONFIG_SYS_BMAN_MEM_PHYS
14b5b06fb7SYork Sun 	SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN),
15b5b06fb7SYork Sun #endif
16b5b06fb7SYork Sun #ifdef CONFIG_SYS_QMAN_MEM_PHYS
17b5b06fb7SYork Sun 	SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
18b5b06fb7SYork Sun #endif
19b5b06fb7SYork Sun 	SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
20b5b06fb7SYork Sun #ifdef CONFIG_SYS_DCSRBAR_PHYS
2149e946cbSStephen George 	/* Limit DCSR to 32M to access NPC Trace Buffer */
2249e946cbSStephen George 	SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
23b5b06fb7SYork Sun #endif
24b5b06fb7SYork Sun #ifdef CONFIG_SYS_NAND_BASE_PHYS
25b5b06fb7SYork Sun 	SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
26b5b06fb7SYork Sun #endif
27b5b06fb7SYork Sun };
28b5b06fb7SYork Sun 
29b5b06fb7SYork Sun int num_law_entries = ARRAY_SIZE(law_table);
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