1 /* 2 * (C) Copyright 2003 3 * Thomas.Lange@corelatus.se 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <command.h> 10 #include <mach/au1x00.h> 11 #include <asm/mipsregs.h> 12 #include <asm/io.h> 13 14 phys_size_t initdram(int board_type) 15 { 16 /* Sdram is setup by assembler code */ 17 /* If memory could be changed, we should return the true value here */ 18 return MEM_SIZE*1024*1024; 19 } 20 21 #define BCSR_PCMCIA_PC0DRVEN 0x0010 22 #define BCSR_PCMCIA_PC0RST 0x0080 23 24 /* In arch/mips/cpu/cpu.c */ 25 void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ); 26 27 int checkboard (void) 28 { 29 #ifdef CONFIG_IDE_PCMCIA 30 u16 status; 31 volatile u32 *pcmcia_bcsr = (u32*)(DB1XX0_BCSR_ADDR+0x10); 32 #endif /* CONFIG_IDE_PCMCIA */ 33 volatile u32 *phy = (u32*)(DB1XX0_BCSR_ADDR+0xC); 34 volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL; 35 u32 proc_id; 36 37 *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */ 38 39 proc_id = read_c0_prid(); 40 41 switch (proc_id >> 24) { 42 case 0: 43 puts ("Board: Merlot (DbAu1000)\n"); 44 printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n", 45 (proc_id >> 8) & 0xFF, proc_id & 0xFF); 46 break; 47 case 1: 48 puts ("Board: DbAu1500\n"); 49 printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n", 50 (proc_id >> 8) & 0xFF, proc_id & 0xFF); 51 break; 52 case 2: 53 puts ("Board: DbAu1100\n"); 54 printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n", 55 (proc_id >> 8) & 0xFF, proc_id & 0xFF); 56 break; 57 case 3: 58 puts ("Board: DbAu1550\n"); 59 printf ("CPU: Au1550, id: 0x%02x, rev: 0x%02x\n", 60 (proc_id >> 8) & 0xFF, proc_id & 0xFF); 61 break; 62 default: 63 printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id); 64 } 65 66 set_io_port_base(0); 67 68 #ifdef CONFIG_IDE_PCMCIA 69 /* Enable 3.3 V on slot 0 ( VCC ) 70 No 5V */ 71 status = 4; 72 *pcmcia_bcsr = status; 73 74 status |= BCSR_PCMCIA_PC0DRVEN; 75 *pcmcia_bcsr = status; 76 au_sync(); 77 78 udelay(300*1000); 79 80 status |= BCSR_PCMCIA_PC0RST; 81 *pcmcia_bcsr = status; 82 au_sync(); 83 84 udelay(100*1000); 85 86 /* PCMCIA is on a 36 bit physical address. 87 We need to map it into a 32 bit addresses */ 88 89 #if 0 90 /* We dont need theese unless we run whole pcmcia package */ 91 write_one_tlb(20, /* index */ 92 0x01ffe000, /* Pagemask, 16 MB pages */ 93 CONFIG_SYS_PCMCIA_IO_BASE, /* Hi */ 94 0x3C000017, /* Lo0 */ 95 0x3C200017); /* Lo1 */ 96 97 write_one_tlb(21, /* index */ 98 0x01ffe000, /* Pagemask, 16 MB pages */ 99 CONFIG_SYS_PCMCIA_ATTR_BASE, /* Hi */ 100 0x3D000017, /* Lo0 */ 101 0x3D200017); /* Lo1 */ 102 #endif /* 0 */ 103 write_one_tlb(22, /* index */ 104 0x01ffe000, /* Pagemask, 16 MB pages */ 105 CONFIG_SYS_PCMCIA_MEM_ADDR, /* Hi */ 106 0x3E000017, /* Lo0 */ 107 0x3E200017); /* Lo1 */ 108 #endif /* CONFIG_IDE_PCMCIA */ 109 110 /* Release reset of ethernet PHY chips */ 111 /* Always do this, because linux does not know about it */ 112 *phy = 3; 113 114 return 0; 115 } 116