1 /* 2 * (C) Copyright 2003 3 * Thomas.Lange@corelatus.se 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #include <common.h> 25 #include <command.h> 26 #include <asm/au1x00.h> 27 #include <asm/mipsregs.h> 28 29 long int initdram(int board_type) 30 { 31 /* Sdram is setup by assembler code */ 32 /* If memory could be changed, we should return the true value here */ 33 return MEM_SIZE*1024*1024; 34 } 35 36 #define BCSR_PCMCIA_PC0DRVEN 0x0010 37 #define BCSR_PCMCIA_PC0RST 0x0080 38 39 /* In cpu/mips/cpu.c */ 40 void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ); 41 42 int checkboard (void) 43 { 44 #ifdef CONFIG_IDE_PCMCIA 45 u16 status; 46 volatile u32 *pcmcia_bcsr = (u32*)(DB1XX0_BCSR_ADDR+0x10); 47 #endif /* CONFIG_IDE_PCMCIA */ 48 volatile u32 *phy = (u32*)(DB1XX0_BCSR_ADDR+0xC); 49 volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL; 50 u32 proc_id; 51 52 *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */ 53 54 proc_id = read_32bit_cp0_register(CP0_PRID); 55 56 switch (proc_id >> 24) { 57 case 0: 58 puts ("Board: Merlot (DbAu1000)\n"); 59 printf ("CPU: Au1000 396 MHz, id: 0x%02x, rev: 0x%02x\n", 60 (proc_id >> 8) & 0xFF, proc_id & 0xFF); 61 break; 62 case 1: 63 puts ("Board: DbAu1500\n"); 64 printf ("CPU: Au1500, id: 0x%02x, rev: 0x%02x\n", 65 (proc_id >> 8) & 0xFF, proc_id & 0xFF); 66 break; 67 case 2: 68 puts ("Board: DbAu1100\n"); 69 printf ("CPU: Au1100, id: 0x%02x, rev: 0x%02x\n", 70 (proc_id >> 8) & 0xFF, proc_id & 0xFF); 71 break; 72 case 3: 73 puts ("Board: DbAu1550\n"); 74 printf ("CPU: Au1550, id: 0x%02x, rev: 0x%02x\n", 75 (proc_id >> 8) & 0xFF, proc_id & 0xFF); 76 break; 77 default: 78 printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id); 79 } 80 #ifdef CONFIG_IDE_PCMCIA 81 /* Enable 3.3 V on slot 0 ( VCC ) 82 No 5V */ 83 status = 4; 84 *pcmcia_bcsr = status; 85 86 status |= BCSR_PCMCIA_PC0DRVEN; 87 *pcmcia_bcsr = status; 88 au_sync(); 89 90 udelay(300*1000); 91 92 status |= BCSR_PCMCIA_PC0RST; 93 *pcmcia_bcsr = status; 94 au_sync(); 95 96 udelay(100*1000); 97 98 /* PCMCIA is on a 36 bit physical address. 99 We need to map it into a 32 bit addresses */ 100 101 #if 0 102 /* We dont need theese unless we run whole pcmcia package */ 103 write_one_tlb(20, /* index */ 104 0x01ffe000, /* Pagemask, 16 MB pages */ 105 CFG_PCMCIA_IO_BASE, /* Hi */ 106 0x3C000017, /* Lo0 */ 107 0x3C200017); /* Lo1 */ 108 109 write_one_tlb(21, /* index */ 110 0x01ffe000, /* Pagemask, 16 MB pages */ 111 CFG_PCMCIA_ATTR_BASE, /* Hi */ 112 0x3D000017, /* Lo0 */ 113 0x3D200017); /* Lo1 */ 114 #endif /* 0 */ 115 write_one_tlb(22, /* index */ 116 0x01ffe000, /* Pagemask, 16 MB pages */ 117 CFG_PCMCIA_MEM_ADDR, /* Hi */ 118 0x3E000017, /* Lo0 */ 119 0x3E200017); /* Lo1 */ 120 #endif /* CONFIG_IDE_PCMCIA */ 121 122 /* Release reset of ethernet PHY chips */ 123 /* Always do this, because linux does not know about it */ 124 *phy = 3; 125 126 return 0; 127 } 128