xref: /rk3399_rockchip-uboot/board/compulab/cm_t335/u-boot.lds (revision dab5e3469d294a4e1ffed8407d296a78e02cc01f)
154e7445dSIlya Ledvich/*
254e7445dSIlya Ledvich * Copyright (c) 2004-2008 Texas Instruments
354e7445dSIlya Ledvich *
454e7445dSIlya Ledvich * (C) Copyright 2002
554e7445dSIlya Ledvich * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
654e7445dSIlya Ledvich *
754e7445dSIlya Ledvich * SPDX-License-Identifier:	GPL-2.0+
854e7445dSIlya Ledvich */
954e7445dSIlya Ledvich
1054e7445dSIlya LedvichOUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
1154e7445dSIlya LedvichOUTPUT_ARCH(arm)
1254e7445dSIlya LedvichENTRY(_start)
1354e7445dSIlya LedvichSECTIONS
1454e7445dSIlya Ledvich{
1554e7445dSIlya Ledvich	. = 0x00000000;
1654e7445dSIlya Ledvich
1754e7445dSIlya Ledvich	. = ALIGN(4);
1854e7445dSIlya Ledvich	.text :
1954e7445dSIlya Ledvich	{
2054e7445dSIlya Ledvich		*(.__image_copy_start)
2141623c91SAlbert ARIBAUD		*(.vectors)
2254e7445dSIlya Ledvich		CPUDIR/start.o (.text*)
23f15ea6e1SAlbert ARIBAUD		board/compulab/cm_t335/built-in.o (.text*)
2454e7445dSIlya Ledvich		*(.text*)
2554e7445dSIlya Ledvich	}
2654e7445dSIlya Ledvich
2754e7445dSIlya Ledvich	. = ALIGN(4);
2854e7445dSIlya Ledvich	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
2954e7445dSIlya Ledvich
3054e7445dSIlya Ledvich	. = ALIGN(4);
3154e7445dSIlya Ledvich	.data : {
3254e7445dSIlya Ledvich		*(.data*)
3354e7445dSIlya Ledvich	}
3454e7445dSIlya Ledvich
3554e7445dSIlya Ledvich	. = ALIGN(4);
3654e7445dSIlya Ledvich
3754e7445dSIlya Ledvich	. = .;
3854e7445dSIlya Ledvich
3954e7445dSIlya Ledvich	. = ALIGN(4);
4054e7445dSIlya Ledvich	.u_boot_list : {
4154e7445dSIlya Ledvich		KEEP(*(SORT(.u_boot_list*)));
4254e7445dSIlya Ledvich	}
4354e7445dSIlya Ledvich
4454e7445dSIlya Ledvich	. = ALIGN(4);
4554e7445dSIlya Ledvich
4654e7445dSIlya Ledvich	.image_copy_end :
4754e7445dSIlya Ledvich	{
4854e7445dSIlya Ledvich		*(.__image_copy_end)
4954e7445dSIlya Ledvich	}
5054e7445dSIlya Ledvich
5154e7445dSIlya Ledvich	.rel_dyn_start :
5254e7445dSIlya Ledvich	{
5354e7445dSIlya Ledvich		*(.__rel_dyn_start)
5454e7445dSIlya Ledvich	}
5554e7445dSIlya Ledvich
5654e7445dSIlya Ledvich	.rel.dyn : {
5754e7445dSIlya Ledvich		*(.rel*)
5854e7445dSIlya Ledvich	}
5954e7445dSIlya Ledvich
6054e7445dSIlya Ledvich	.rel_dyn_end :
6154e7445dSIlya Ledvich	{
6254e7445dSIlya Ledvich		*(.__rel_dyn_end)
6354e7445dSIlya Ledvich	}
6454e7445dSIlya Ledvich
65*b8f91eb8SSimon Glass	.hash : { *(.hash*) }
66*b8f91eb8SSimon Glass
67d0b5d9daSAlbert ARIBAUD	.end :
68d0b5d9daSAlbert ARIBAUD	{
69d0b5d9daSAlbert ARIBAUD		*(.__end)
70d0b5d9daSAlbert ARIBAUD	}
71d0b5d9daSAlbert ARIBAUD
72d0b5d9daSAlbert ARIBAUD	_image_binary_end = .;
7354e7445dSIlya Ledvich
7454e7445dSIlya Ledvich	/*
7554e7445dSIlya Ledvich	 * Deprecated: this MMU section is used by pxa at present but
7654e7445dSIlya Ledvich	 * should not be used by new boards/CPUs.
7754e7445dSIlya Ledvich	 */
7854e7445dSIlya Ledvich	. = ALIGN(4096);
7954e7445dSIlya Ledvich	.mmutable : {
8054e7445dSIlya Ledvich		*(.mmutable)
8154e7445dSIlya Ledvich	}
8254e7445dSIlya Ledvich
8354e7445dSIlya Ledvich/*
8454e7445dSIlya Ledvich * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
8554e7445dSIlya Ledvich * __bss_base and __bss_limit are for linker only (overlay ordering)
8654e7445dSIlya Ledvich */
8754e7445dSIlya Ledvich
8854e7445dSIlya Ledvich	.bss_start __rel_dyn_start (OVERLAY) : {
8954e7445dSIlya Ledvich		KEEP(*(.__bss_start));
9054e7445dSIlya Ledvich		__bss_base = .;
9154e7445dSIlya Ledvich	}
9254e7445dSIlya Ledvich
9354e7445dSIlya Ledvich	.bss __bss_base (OVERLAY) : {
9454e7445dSIlya Ledvich		*(.bss*)
9554e7445dSIlya Ledvich		 . = ALIGN(4);
9654e7445dSIlya Ledvich		 __bss_limit = .;
9754e7445dSIlya Ledvich	}
9854e7445dSIlya Ledvich
9954e7445dSIlya Ledvich	.bss_end __bss_limit (OVERLAY) : {
10054e7445dSIlya Ledvich		KEEP(*(.__bss_end));
10154e7445dSIlya Ledvich	}
10254e7445dSIlya Ledvich
103d0b5d9daSAlbert ARIBAUD	.dynsym _image_binary_end : { *(.dynsym) }
10462bbc2f2SAlbert ARIBAUD	.dynbss : { *(.dynbss) }
10562bbc2f2SAlbert ARIBAUD	.dynstr : { *(.dynstr*) }
10662bbc2f2SAlbert ARIBAUD	.dynamic : { *(.dynamic*) }
10762bbc2f2SAlbert ARIBAUD	.plt : { *(.plt*) }
10862bbc2f2SAlbert ARIBAUD	.interp : { *(.interp*) }
10962bbc2f2SAlbert ARIBAUD	.gnu : { *(.gnu*) }
11062bbc2f2SAlbert ARIBAUD	.ARM.exidx : { *(.ARM.exidx*) }
11154e7445dSIlya Ledvich}
112