xref: /rk3399_rockchip-uboot/board/compulab/cm_fx6/cm_fx6.c (revision e32028a70ba2be17732b21f98b242d9fe3d977cf)
1 /*
2  * Board functions for Compulab CM-FX6 board
3  *
4  * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
5  *
6  * Author: Nikita Kiryanov <nikita@compulab.co.il>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #include <common.h>
12 #include <fsl_esdhc.h>
13 #include <asm/arch/sys_proto.h>
14 #include "common.h"
15 
16 DECLARE_GLOBAL_DATA_PTR;
17 
18 #ifdef CONFIG_FSL_ESDHC
19 static struct fsl_esdhc_cfg usdhc_cfg[3] = {
20 	{USDHC1_BASE_ADDR},
21 	{USDHC2_BASE_ADDR},
22 	{USDHC3_BASE_ADDR},
23 };
24 
25 static enum mxc_clock usdhc_clk[3] = {
26 	MXC_ESDHC_CLK,
27 	MXC_ESDHC2_CLK,
28 	MXC_ESDHC3_CLK,
29 };
30 
31 int board_mmc_init(bd_t *bis)
32 {
33 	int i;
34 
35 	cm_fx6_set_usdhc_iomux();
36 	for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
37 		usdhc_cfg[i].sdhc_clk = mxc_get_clock(usdhc_clk[i]);
38 		usdhc_cfg[i].max_bus_width = 4;
39 		fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
40 		enable_usdhc_clk(1, i);
41 	}
42 
43 	return 0;
44 }
45 #endif
46 
47 int board_init(void)
48 {
49 	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
50 	return 0;
51 }
52 
53 int checkboard(void)
54 {
55 	puts("Board: CM-FX6\n");
56 	return 0;
57 }
58 
59 void dram_init_banksize(void)
60 {
61 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
62 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
63 
64 	switch (gd->ram_size) {
65 	case 0x10000000: /* DDR_16BIT_256MB */
66 		gd->bd->bi_dram[0].size = 0x10000000;
67 		gd->bd->bi_dram[1].size = 0;
68 		break;
69 	case 0x20000000: /* DDR_32BIT_512MB */
70 		gd->bd->bi_dram[0].size = 0x20000000;
71 		gd->bd->bi_dram[1].size = 0;
72 		break;
73 	case 0x40000000:
74 		if (is_cpu_type(MXC_CPU_MX6SOLO)) { /* DDR_32BIT_1GB */
75 			gd->bd->bi_dram[0].size = 0x20000000;
76 			gd->bd->bi_dram[1].size = 0x20000000;
77 		} else { /* DDR_64BIT_1GB */
78 			gd->bd->bi_dram[0].size = 0x40000000;
79 			gd->bd->bi_dram[1].size = 0;
80 		}
81 		break;
82 	case 0x80000000: /* DDR_64BIT_2GB */
83 		gd->bd->bi_dram[0].size = 0x40000000;
84 		gd->bd->bi_dram[1].size = 0x40000000;
85 		break;
86 	case 0xEFF00000: /* DDR_64BIT_4GB */
87 		gd->bd->bi_dram[0].size = 0x70000000;
88 		gd->bd->bi_dram[1].size = 0x7FF00000;
89 		break;
90 	}
91 }
92 
93 int dram_init(void)
94 {
95 	gd->ram_size = imx_ddr_size();
96 	switch (gd->ram_size) {
97 	case 0x10000000:
98 	case 0x20000000:
99 	case 0x40000000:
100 	case 0x80000000:
101 		break;
102 	case 0xF0000000:
103 		gd->ram_size -= 0x100000;
104 		break;
105 	default:
106 		printf("ERROR: Unsupported DRAM size 0x%lx\n", gd->ram_size);
107 		return -1;
108 	}
109 
110 	return 0;
111 }
112