xref: /rk3399_rockchip-uboot/board/cloudengines/pogo_e02/pogo_e02.h (revision 326ea986ac150acdc7656d57fca647db80b50158)
11d0f5fa1SDavid Purdy /*
21d0f5fa1SDavid Purdy  * Copyright (C) 2012
31d0f5fa1SDavid Purdy  * David Purdy <david.c.purdy@gmail.com>
41d0f5fa1SDavid Purdy  *
51d0f5fa1SDavid Purdy  * Based on Kirkwood support:
61d0f5fa1SDavid Purdy  * (C) Copyright 2009
71d0f5fa1SDavid Purdy  * Marvell Semiconductor <www.marvell.com>
81d0f5fa1SDavid Purdy  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
91d0f5fa1SDavid Purdy  *
10*1a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
111d0f5fa1SDavid Purdy  */
121d0f5fa1SDavid Purdy 
131d0f5fa1SDavid Purdy #ifndef __POGO_E02_H
141d0f5fa1SDavid Purdy #define __POGO_E02_H
151d0f5fa1SDavid Purdy 
161d0f5fa1SDavid Purdy /* GPIO configuration */
171d0f5fa1SDavid Purdy #define POGO_E02_OE_LOW				(~(0))
181d0f5fa1SDavid Purdy #define POGO_E02_OE_HIGH			(~(0))
191d0f5fa1SDavid Purdy #define POGO_E02_OE_VAL_LOW			(1 << 29)
201d0f5fa1SDavid Purdy #define POGO_E02_OE_VAL_HIGH			0
211d0f5fa1SDavid Purdy 
221d0f5fa1SDavid Purdy /* PHY related */
231d0f5fa1SDavid Purdy #define MV88E1116_LED_FCTRL_REG			10
241d0f5fa1SDavid Purdy #define MV88E1116_CPRSP_CR3_REG			21
251d0f5fa1SDavid Purdy #define MV88E1116_MAC_CTRL_REG			21
261d0f5fa1SDavid Purdy #define MV88E1116_PGADR_REG			22
271d0f5fa1SDavid Purdy #define MV88E1116_RGMII_TXTM_CTRL		(1 << 4)
281d0f5fa1SDavid Purdy #define MV88E1116_RGMII_RXTM_CTRL		(1 << 5)
291d0f5fa1SDavid Purdy 
301d0f5fa1SDavid Purdy #endif /* __POGO_E02_H */
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