xref: /rk3399_rockchip-uboot/board/cavium/thunderx/thunderx.c (revision 746f985add5244c00a5dbb19bc67ceab52566a91)
1*746f985aSSergey Temerkhanov /**
2*746f985aSSergey Temerkhanov  * (C) Copyright 2014, Cavium Inc.
3*746f985aSSergey Temerkhanov  *
4*746f985aSSergey Temerkhanov  * SPDX-License-Identifier:	GPL-2.0+
5*746f985aSSergey Temerkhanov **/
6*746f985aSSergey Temerkhanov 
7*746f985aSSergey Temerkhanov #include <common.h>
8*746f985aSSergey Temerkhanov #include <malloc.h>
9*746f985aSSergey Temerkhanov #include <errno.h>
10*746f985aSSergey Temerkhanov #include <linux/compiler.h>
11*746f985aSSergey Temerkhanov 
12*746f985aSSergey Temerkhanov #if !CONFIG_IS_ENABLED(OF_CONTROL)
13*746f985aSSergey Temerkhanov #include <dm/platdata.h>
14*746f985aSSergey Temerkhanov #include <dm/platform_data/serial_pl01x.h>
15*746f985aSSergey Temerkhanov 
16*746f985aSSergey Temerkhanov static const struct pl01x_serial_platdata serial0 = {
17*746f985aSSergey Temerkhanov 	.base = CONFIG_SYS_SERIAL0,
18*746f985aSSergey Temerkhanov 	.type = TYPE_PL011,
19*746f985aSSergey Temerkhanov 	.clock = 0,
20*746f985aSSergey Temerkhanov 	.skip_init = true,
21*746f985aSSergey Temerkhanov };
22*746f985aSSergey Temerkhanov 
23*746f985aSSergey Temerkhanov U_BOOT_DEVICE(thunderx_serial0) = {
24*746f985aSSergey Temerkhanov 	.name = "serial_pl01x",
25*746f985aSSergey Temerkhanov 	.platdata = &serial0,
26*746f985aSSergey Temerkhanov };
27*746f985aSSergey Temerkhanov 
28*746f985aSSergey Temerkhanov static const struct pl01x_serial_platdata serial1 = {
29*746f985aSSergey Temerkhanov 	.base = CONFIG_SYS_SERIAL1,
30*746f985aSSergey Temerkhanov 	.type = TYPE_PL011,
31*746f985aSSergey Temerkhanov 	.clock = 0,
32*746f985aSSergey Temerkhanov 	.skip_init = true,
33*746f985aSSergey Temerkhanov };
34*746f985aSSergey Temerkhanov 
35*746f985aSSergey Temerkhanov U_BOOT_DEVICE(thunderx_serial1) = {
36*746f985aSSergey Temerkhanov 	.name = "serial_pl01x",
37*746f985aSSergey Temerkhanov 	.platdata = &serial1,
38*746f985aSSergey Temerkhanov };
39*746f985aSSergey Temerkhanov #endif
40*746f985aSSergey Temerkhanov 
41*746f985aSSergey Temerkhanov DECLARE_GLOBAL_DATA_PTR;
42*746f985aSSergey Temerkhanov 
43*746f985aSSergey Temerkhanov int board_init(void)
44*746f985aSSergey Temerkhanov {
45*746f985aSSergey Temerkhanov 	return 0;
46*746f985aSSergey Temerkhanov }
47*746f985aSSergey Temerkhanov 
48*746f985aSSergey Temerkhanov int timer_init(void)
49*746f985aSSergey Temerkhanov {
50*746f985aSSergey Temerkhanov 	return 0;
51*746f985aSSergey Temerkhanov }
52*746f985aSSergey Temerkhanov 
53*746f985aSSergey Temerkhanov /*
54*746f985aSSergey Temerkhanov  * Board specific reset that is system reset.
55*746f985aSSergey Temerkhanov  */
56*746f985aSSergey Temerkhanov void reset_cpu(ulong addr)
57*746f985aSSergey Temerkhanov {
58*746f985aSSergey Temerkhanov }
59*746f985aSSergey Temerkhanov 
60*746f985aSSergey Temerkhanov /*
61*746f985aSSergey Temerkhanov  * Board specific ethernet initialization routine.
62*746f985aSSergey Temerkhanov  */
63*746f985aSSergey Temerkhanov int board_eth_init(bd_t *bis)
64*746f985aSSergey Temerkhanov {
65*746f985aSSergey Temerkhanov 	int rc = 0;
66*746f985aSSergey Temerkhanov 
67*746f985aSSergey Temerkhanov 	return rc;
68*746f985aSSergey Temerkhanov }
69*746f985aSSergey Temerkhanov 
70*746f985aSSergey Temerkhanov #ifdef CONFIG_PCI
71*746f985aSSergey Temerkhanov void pci_init_board(void)
72*746f985aSSergey Temerkhanov {
73*746f985aSSergey Temerkhanov 	printf("DEBUG: PCI Init TODO *****\n");
74*746f985aSSergey Temerkhanov }
75*746f985aSSergey Temerkhanov #endif
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