xref: /rk3399_rockchip-uboot/board/broadcom/bcm_ep/board.c (revision 76b00aca4f1c13bc8f91a539e612abc70d0c692f)
1da1f5ac2SScott Branden /*
2da1f5ac2SScott Branden  * Copyright 2014 Broadcom Corporation.
3da1f5ac2SScott Branden  *
4da1f5ac2SScott Branden  * SPDX-License-Identifier:	GPL-2.0+
5da1f5ac2SScott Branden  */
6da1f5ac2SScott Branden 
7da1f5ac2SScott Branden #include <common.h>
8da1f5ac2SScott Branden #include <asm/io.h>
9da1f5ac2SScott Branden #include <config.h>
1039d0ce06SJiandong Zheng #include <netdev.h>
11da1f5ac2SScott Branden #include <asm/system.h>
12da1f5ac2SScott Branden #include <asm/iproc-common/armpll.h>
13da1f5ac2SScott Branden 
14da1f5ac2SScott Branden DECLARE_GLOBAL_DATA_PTR;
15da1f5ac2SScott Branden 
16da1f5ac2SScott Branden /*
17da1f5ac2SScott Branden  * board_init - early hardware init
18da1f5ac2SScott Branden  */
board_init(void)19da1f5ac2SScott Branden int board_init(void)
20da1f5ac2SScott Branden {
21da1f5ac2SScott Branden 	/*
22da1f5ac2SScott Branden 	 * Address of boot parameters passed to kernel
23da1f5ac2SScott Branden 	 * Use default offset 0x100
24da1f5ac2SScott Branden 	 */
25da1f5ac2SScott Branden 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
26da1f5ac2SScott Branden 
27da1f5ac2SScott Branden 	return 0;
28da1f5ac2SScott Branden }
29da1f5ac2SScott Branden 
30da1f5ac2SScott Branden /*
31da1f5ac2SScott Branden  * dram_init - sets u-boot's idea of sdram size
32da1f5ac2SScott Branden  */
dram_init(void)33da1f5ac2SScott Branden int dram_init(void)
34da1f5ac2SScott Branden {
35da1f5ac2SScott Branden 	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
36da1f5ac2SScott Branden 				    CONFIG_SYS_SDRAM_SIZE);
37da1f5ac2SScott Branden 	return 0;
38da1f5ac2SScott Branden }
39da1f5ac2SScott Branden 
dram_init_banksize(void)40*76b00acaSSimon Glass int dram_init_banksize(void)
41da1f5ac2SScott Branden {
42da1f5ac2SScott Branden 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
43da1f5ac2SScott Branden 	gd->bd->bi_dram[0].size = gd->ram_size;
44*76b00acaSSimon Glass 
45*76b00acaSSimon Glass 	return 0;
46da1f5ac2SScott Branden }
47da1f5ac2SScott Branden 
board_early_init_f(void)48da1f5ac2SScott Branden int board_early_init_f(void)
49da1f5ac2SScott Branden {
50da1f5ac2SScott Branden 	uint32_t status = 0;
51da1f5ac2SScott Branden 
52da1f5ac2SScott Branden 	/* Setup PLL if required */
53da1f5ac2SScott Branden #if defined(CONFIG_ARMCLK)
54da1f5ac2SScott Branden 	armpll_config(CONFIG_ARMCLK);
55da1f5ac2SScott Branden #endif
56da1f5ac2SScott Branden 
57da1f5ac2SScott Branden 	return status;
58da1f5ac2SScott Branden }
59abb1678cSSteve Rae 
60104d6fb6SJan Kiszka #ifdef CONFIG_ARMV7_NONSEC
smp_set_core_boot_addr(unsigned long addr,int corenr)61abb1678cSSteve Rae void smp_set_core_boot_addr(unsigned long addr, int corenr)
62abb1678cSSteve Rae {
63abb1678cSSteve Rae }
64abb1678cSSteve Rae 
smp_kick_all_cpus(void)65abb1678cSSteve Rae void smp_kick_all_cpus(void)
66abb1678cSSteve Rae {
67abb1678cSSteve Rae }
68abb1678cSSteve Rae 
smp_waitloop(unsigned previous_address)69abb1678cSSteve Rae void smp_waitloop(unsigned previous_address)
70abb1678cSSteve Rae {
71abb1678cSSteve Rae }
72abb1678cSSteve Rae #endif
7339d0ce06SJiandong Zheng 
7439d0ce06SJiandong Zheng #ifdef CONFIG_BCM_SF2_ETH
board_eth_init(bd_t * bis)7539d0ce06SJiandong Zheng int board_eth_init(bd_t *bis)
7639d0ce06SJiandong Zheng {
7739d0ce06SJiandong Zheng 	int rc = -1;
7839d0ce06SJiandong Zheng 	printf("Registering BCM sf2 eth\n");
7939d0ce06SJiandong Zheng 	rc = bcm_sf2_eth_register(bis, 0);
8039d0ce06SJiandong Zheng 	return rc;
8139d0ce06SJiandong Zheng }
8239d0ce06SJiandong Zheng #endif
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