1f225d39dSJon Medhurst \(Tixy\) /*
2f225d39dSJon Medhurst \(Tixy\) * (C) Copyright 2016 Linaro
3f225d39dSJon Medhurst \(Tixy\) * Jon Medhurst <tixy@linaro.org>
4f225d39dSJon Medhurst \(Tixy\) *
5f225d39dSJon Medhurst \(Tixy\) * TC2 specific code for Versatile Express.
6f225d39dSJon Medhurst \(Tixy\) *
7f225d39dSJon Medhurst \(Tixy\) * SPDX-License-Identifier: GPL-2.0+
8f225d39dSJon Medhurst \(Tixy\) */
9f225d39dSJon Medhurst \(Tixy\)
1003ab5d13SSudeep Holla #include <asm/armv7.h>
11f225d39dSJon Medhurst \(Tixy\) #include <asm/io.h>
1203ab5d13SSudeep Holla #include <asm/u-boot.h>
1303ab5d13SSudeep Holla #include <common.h>
14*0e00a84cSMasahiro Yamada #include <linux/libfdt.h>
15f225d39dSJon Medhurst \(Tixy\)
16f225d39dSJon Medhurst \(Tixy\) #define SCC_BASE 0x7fff0000
17f225d39dSJon Medhurst \(Tixy\)
armv7_boot_nonsec_default(void)18f225d39dSJon Medhurst \(Tixy\) bool armv7_boot_nonsec_default(void)
19f225d39dSJon Medhurst \(Tixy\) {
20f225d39dSJon Medhurst \(Tixy\) #ifdef CONFIG_ARMV7_BOOT_SEC_DEFAULT
21f225d39dSJon Medhurst \(Tixy\) return false
22f225d39dSJon Medhurst \(Tixy\) #else
23f225d39dSJon Medhurst \(Tixy\) /*
24f225d39dSJon Medhurst \(Tixy\) * The Serial Configuration Controller (SCC) register at address 0x700
25f225d39dSJon Medhurst \(Tixy\) * contains flags for configuring the behaviour of the Boot Monitor
26f225d39dSJon Medhurst \(Tixy\) * (which CPUs execute from reset). Two of these bits are of interest:
27f225d39dSJon Medhurst \(Tixy\) *
28f225d39dSJon Medhurst \(Tixy\) * bit 12 = Use per-cpu mailboxes for power management
29f225d39dSJon Medhurst \(Tixy\) * bit 13 = Power down the non-boot cluster
30f225d39dSJon Medhurst \(Tixy\) *
31f225d39dSJon Medhurst \(Tixy\) * It is only when both of these are false that U-Boot's current
32f225d39dSJon Medhurst \(Tixy\) * implementation of 'nonsec' mode can work as expected because we
33f225d39dSJon Medhurst \(Tixy\) * rely on getting all CPUs to execute _nonsec_init, so let's check that.
34f225d39dSJon Medhurst \(Tixy\) */
35f225d39dSJon Medhurst \(Tixy\) return (readl((u32 *)(SCC_BASE + 0x700)) & ((1 << 12) | (1 << 13))) == 0;
36f225d39dSJon Medhurst \(Tixy\) #endif
37f225d39dSJon Medhurst \(Tixy\) }
3803ab5d13SSudeep Holla
3903ab5d13SSudeep Holla #ifdef CONFIG_OF_BOARD_SETUP
4003ab5d13SSudeep Holla int ft_board_setup(void *fdt, bd_t *bd)
4103ab5d13SSudeep Holla {
4203ab5d13SSudeep Holla int offset, tmp, len;
4303ab5d13SSudeep Holla const struct fdt_property *prop;
4403ab5d13SSudeep Holla const char *cci_compatible = "arm,cci-400-ctrl-if";
4503ab5d13SSudeep Holla
4603ab5d13SSudeep Holla #ifdef CONFIG_ARMV7_NONSEC
4703ab5d13SSudeep Holla if (!armv7_boot_nonsec())
4803ab5d13SSudeep Holla return 0;
4903ab5d13SSudeep Holla #else
5003ab5d13SSudeep Holla return 0;
5103ab5d13SSudeep Holla #endif
5203ab5d13SSudeep Holla /* Booting in nonsec mode, disable CCI access */
5303ab5d13SSudeep Holla offset = fdt_path_offset(fdt, "/cpus");
5403ab5d13SSudeep Holla if (offset < 0) {
5503ab5d13SSudeep Holla printf("couldn't find /cpus\n");
5603ab5d13SSudeep Holla return offset;
5703ab5d13SSudeep Holla }
5803ab5d13SSudeep Holla
5903ab5d13SSudeep Holla /* delete cci-control-port in each cpu node */
6003ab5d13SSudeep Holla for (tmp = fdt_first_subnode(fdt, offset); tmp >= 0;
6103ab5d13SSudeep Holla tmp = fdt_next_subnode(fdt, tmp))
6203ab5d13SSudeep Holla fdt_delprop(fdt, tmp, "cci-control-port");
6303ab5d13SSudeep Holla
6403ab5d13SSudeep Holla /* disable all ace cci slave ports */
6503ab5d13SSudeep Holla offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible",
6603ab5d13SSudeep Holla cci_compatible, 20);
6703ab5d13SSudeep Holla while (offset > 0) {
6803ab5d13SSudeep Holla prop = fdt_get_property(fdt, offset, "interface-type",
6903ab5d13SSudeep Holla &len);
7003ab5d13SSudeep Holla if (!prop)
7103ab5d13SSudeep Holla continue;
7203ab5d13SSudeep Holla if (len < 4)
7303ab5d13SSudeep Holla continue;
7403ab5d13SSudeep Holla if (strcmp(prop->data, "ace"))
7503ab5d13SSudeep Holla continue;
7603ab5d13SSudeep Holla
7703ab5d13SSudeep Holla fdt_setprop_string(fdt, offset, "status", "disabled");
7803ab5d13SSudeep Holla
7903ab5d13SSudeep Holla offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible",
8003ab5d13SSudeep Holla cci_compatible, 20);
8103ab5d13SSudeep Holla }
8203ab5d13SSudeep Holla
8303ab5d13SSudeep Holla return 0;
8403ab5d13SSudeep Holla }
8503ab5d13SSudeep Holla #endif /* CONFIG_OF_BOARD_SETUP */
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