1 /* 2 * (C) Copyright 2002 3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 4 * Marius Groeger <mgroeger@sysgo.de> 5 * 6 * (C) Copyright 2002 7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> 8 * 9 * (C) Copyright 2003 10 * Texas Instruments, <www.ti.com> 11 * Kshitij Gupta <Kshitij@ti.com> 12 * 13 * (C) Copyright 2004 14 * ARM Ltd. 15 * Philippe Robin, <philippe.robin@arm.com> 16 * 17 * See file CREDITS for list of people who contributed to this 18 * project. 19 * 20 * This program is free software; you can redistribute it and/or 21 * modify it under the terms of the GNU General Public License as 22 * published by the Free Software Foundation; either version 2 of 23 * the License, or (at your option) any later version. 24 * 25 * This program is distributed in the hope that it will be useful, 26 * but WITHOUT ANY WARRANTY; without even the implied warranty of 27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 28 * GNU General Public License for more details. 29 * 30 * You should have received a copy of the GNU General Public License 31 * along with this program; if not, write to the Free Software 32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 33 * MA 02111-1307 USA 34 */ 35 36 #include <common.h> 37 #include <netdev.h> 38 #include <asm/io.h> 39 40 DECLARE_GLOBAL_DATA_PTR; 41 42 void peripheral_power_enable (void); 43 44 #if defined(CONFIG_SHOW_BOOT_PROGRESS) 45 void show_boot_progress(int progress) 46 { 47 printf("Boot reached stage %d\n", progress); 48 } 49 #endif 50 51 #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF) 52 53 /* 54 * Miscellaneous platform dependent initialisations 55 */ 56 57 int board_init (void) 58 { 59 /* arch number of Integrator Board */ 60 #ifdef CONFIG_ARCH_CINTEGRATOR 61 gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR; 62 #else 63 gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR; 64 #endif 65 66 /* adress of boot parameters */ 67 gd->bd->bi_boot_params = 0x00000100; 68 69 gd->flags = 0; 70 71 #ifdef CONFIG_CM_REMAP 72 extern void cm_remap(void); 73 cm_remap(); /* remaps writeable memory to 0x00000000 */ 74 #endif 75 76 icache_enable (); 77 78 return 0; 79 } 80 81 int misc_init_r (void) 82 { 83 #ifdef CONFIG_PCI 84 pci_init(); 85 #endif 86 setenv("verify", "n"); 87 return (0); 88 } 89 90 /* 91 * The Integrator remaps the Flash memory to 0x00000000 and executes U-Boot 92 * from there, which means we cannot test the RAM underneath the ROM at this 93 * point. It will be unmapped later on, when we are executing from the 94 * relocated in RAM U-Boot. We simply assume that this RAM is usable if the 95 * RAM on higher addresses works fine. 96 */ 97 #define REMAPPED_FLASH_SZ 0x40000 98 99 int dram_init (void) 100 { 101 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 102 #ifdef CONFIG_CM_SPD_DETECT 103 { 104 extern void dram_query(void); 105 u32 cm_reg_sdram; 106 u32 sdram_shift; 107 108 dram_query(); /* Assembler accesses to CM registers */ 109 /* Queries the SPD values */ 110 111 /* Obtain the SDRAM size from the CM SDRAM register */ 112 113 cm_reg_sdram = readl(CM_BASE + OS_SDRAM); 114 /* Register SDRAM size 115 * 116 * 0xXXXXXXbbb000bb 16 MB 117 * 0xXXXXXXbbb001bb 32 MB 118 * 0xXXXXXXbbb010bb 64 MB 119 * 0xXXXXXXbbb011bb 128 MB 120 * 0xXXXXXXbbb100bb 256 MB 121 * 122 */ 123 sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4; 124 gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE + 125 REMAPPED_FLASH_SZ, 126 0x01000000 << sdram_shift); 127 } 128 #else 129 gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE + 130 REMAPPED_FLASH_SZ, 131 PHYS_SDRAM_1_SIZE); 132 #endif /* CM_SPD_DETECT */ 133 /* We only have one bank of RAM, set it to whatever was detected */ 134 gd->bd->bi_dram[0].size = gd->ram_size; 135 136 return 0; 137 } 138 139 #ifdef CONFIG_CMD_NET 140 int board_eth_init(bd_t *bis) 141 { 142 int rc = 0; 143 #ifdef CONFIG_SMC91111 144 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); 145 #endif 146 rc += pci_eth_init(bis); 147 return rc; 148 } 149 #endif 150