177f29293SSébastien Szymanski /*
277f29293SSébastien Szymanski * Copyright (C) 2017 Armadeus Systems
377f29293SSébastien Szymanski *
477f29293SSébastien Szymanski * SPDX-License-Identifier: GPL-2.0+
577f29293SSébastien Szymanski */
677f29293SSébastien Szymanski
777f29293SSébastien Szymanski #include <asm/arch/clock.h>
877f29293SSébastien Szymanski #include <asm/arch/mx6-pins.h>
977f29293SSébastien Szymanski #include <asm/arch/opos6ul.h>
1077f29293SSébastien Szymanski #include <asm/arch/sys_proto.h>
1177f29293SSébastien Szymanski #include <asm/gpio.h>
12*552a848eSStefano Babic #include <asm/mach-imx/iomux-v3.h>
1377f29293SSébastien Szymanski #include <asm/io.h>
1477f29293SSébastien Szymanski #include <common.h>
1577f29293SSébastien Szymanski
1677f29293SSébastien Szymanski DECLARE_GLOBAL_DATA_PTR;
1777f29293SSébastien Szymanski
1877f29293SSébastien Szymanski #ifdef CONFIG_VIDEO_MXS
1977f29293SSébastien Szymanski #define LCD_PAD_CTRL ( \
2077f29293SSébastien Szymanski PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
2177f29293SSébastien Szymanski PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm \
2277f29293SSébastien Szymanski )
2377f29293SSébastien Szymanski
2477f29293SSébastien Szymanski static iomux_v3_cfg_t const lcd_pads[] = {
2577f29293SSébastien Szymanski MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
2677f29293SSébastien Szymanski MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
2777f29293SSébastien Szymanski MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
2877f29293SSébastien Szymanski MX6_PAD_LCD_VSYNC__LCDIF_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
2977f29293SSébastien Szymanski MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
3077f29293SSébastien Szymanski MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
3177f29293SSébastien Szymanski MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
3277f29293SSébastien Szymanski MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
3377f29293SSébastien Szymanski MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
3477f29293SSébastien Szymanski MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
3577f29293SSébastien Szymanski MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
3677f29293SSébastien Szymanski MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
3777f29293SSébastien Szymanski MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
3877f29293SSébastien Szymanski MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
3977f29293SSébastien Szymanski MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
4077f29293SSébastien Szymanski MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
4177f29293SSébastien Szymanski MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
4277f29293SSébastien Szymanski MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
4377f29293SSébastien Szymanski MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
4477f29293SSébastien Szymanski MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
4577f29293SSébastien Szymanski MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
4677f29293SSébastien Szymanski MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
4777f29293SSébastien Szymanski
4877f29293SSébastien Szymanski MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL)
4977f29293SSébastien Szymanski };
5077f29293SSébastien Szymanski
setup_lcd(void)5177f29293SSébastien Szymanski int setup_lcd(void)
5277f29293SSébastien Szymanski {
5377f29293SSébastien Szymanski struct gpio_desc backlight;
5477f29293SSébastien Szymanski int ret;
5577f29293SSébastien Szymanski
5677f29293SSébastien Szymanski enable_lcdif_clock(LCDIF1_BASE_ADDR, 1);
5777f29293SSébastien Szymanski
5877f29293SSébastien Szymanski imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
5977f29293SSébastien Szymanski
6077f29293SSébastien Szymanski /* Set Brightness to high */
6177f29293SSébastien Szymanski ret = dm_gpio_lookup_name("GPIO4_10", &backlight);
6277f29293SSébastien Szymanski if (ret) {
6377f29293SSébastien Szymanski printf("Cannot get GPIO4_10\n");
6477f29293SSébastien Szymanski return ret;
6577f29293SSébastien Szymanski }
6677f29293SSébastien Szymanski
6777f29293SSébastien Szymanski ret = dm_gpio_request(&backlight, "backlight");
6877f29293SSébastien Szymanski if (ret) {
6977f29293SSébastien Szymanski printf("Cannot request GPIO4_10\n");
7077f29293SSébastien Szymanski return ret;
7177f29293SSébastien Szymanski }
7277f29293SSébastien Szymanski
7377f29293SSébastien Szymanski dm_gpio_set_dir_flags(&backlight, GPIOD_IS_OUT);
7477f29293SSébastien Szymanski dm_gpio_set_value(&backlight, 1);
7577f29293SSébastien Szymanski
7677f29293SSébastien Szymanski return 0;
7777f29293SSébastien Szymanski }
7877f29293SSébastien Szymanski #endif
7977f29293SSébastien Szymanski
8077f29293SSébastien Szymanski #ifdef CONFIG_USB_EHCI_MX6
8177f29293SSébastien Szymanski #define USB_OTHERREGS_OFFSET 0x800
8277f29293SSébastien Szymanski #define UCTRL_PWR_POL (1 << 9)
8377f29293SSébastien Szymanski
board_ehci_hcd_init(int port)8477f29293SSébastien Szymanski int board_ehci_hcd_init(int port)
8577f29293SSébastien Szymanski {
8677f29293SSébastien Szymanski u32 *usbnc_usb_ctrl;
8777f29293SSébastien Szymanski
8877f29293SSébastien Szymanski if (port > 1)
8977f29293SSébastien Szymanski return -EINVAL;
9077f29293SSébastien Szymanski
9177f29293SSébastien Szymanski usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
9277f29293SSébastien Szymanski port * 4);
9377f29293SSébastien Szymanski
9477f29293SSébastien Szymanski /* Set Power polarity */
9577f29293SSébastien Szymanski setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
9677f29293SSébastien Szymanski
9777f29293SSébastien Szymanski return 0;
9877f29293SSébastien Szymanski }
9977f29293SSébastien Szymanski #endif
10077f29293SSébastien Szymanski
opos6ul_board_late_init(void)10177f29293SSébastien Szymanski int opos6ul_board_late_init(void)
10277f29293SSébastien Szymanski {
10377f29293SSébastien Szymanski #ifdef CONFIG_VIDEO_MXS
10477f29293SSébastien Szymanski setup_lcd();
10577f29293SSébastien Szymanski #endif
10677f29293SSébastien Szymanski
10777f29293SSébastien Szymanski return 0;
10877f29293SSébastien Szymanski }
10977f29293SSébastien Szymanski
11077f29293SSébastien Szymanski #ifdef CONFIG_SPL_BUILD
11177f29293SSébastien Szymanski #define UART_PAD_CTRL ( \
11277f29293SSébastien Szymanski PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
11377f29293SSébastien Szymanski PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST \
11477f29293SSébastien Szymanski )
11577f29293SSébastien Szymanski
11677f29293SSébastien Szymanski static iomux_v3_cfg_t const uart1_pads[] = {
11777f29293SSébastien Szymanski MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
11877f29293SSébastien Szymanski MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
11977f29293SSébastien Szymanski };
12077f29293SSébastien Szymanski
opos6ul_setup_uart_debug(void)12177f29293SSébastien Szymanski void opos6ul_setup_uart_debug(void)
12277f29293SSébastien Szymanski {
12377f29293SSébastien Szymanski imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
12477f29293SSébastien Szymanski }
12577f29293SSébastien Szymanski #endif /* CONFIG_SPL_BUILD */
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