xref: /rk3399_rockchip-uboot/board/Marvell/openrd/openrd.h (revision 5f5620ab2679608f94b3a77e51c77d0a770103bd)
1*35629363SAlbert ARIBAUD /*
2*35629363SAlbert ARIBAUD  * (C) Copyright 2009
3*35629363SAlbert ARIBAUD  * Net Insight <www.netinsight.net>
4*35629363SAlbert ARIBAUD  * Written-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
5*35629363SAlbert ARIBAUD  *
6*35629363SAlbert ARIBAUD  * Based on sheevaplug.h:
7*35629363SAlbert ARIBAUD  * (C) Copyright 2009
8*35629363SAlbert ARIBAUD  * Marvell Semiconductor <www.marvell.com>
9*35629363SAlbert ARIBAUD  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
10*35629363SAlbert ARIBAUD  *
11*35629363SAlbert ARIBAUD  * SPDX-License-Identifier:	GPL-2.0+
12*35629363SAlbert ARIBAUD  */
13*35629363SAlbert ARIBAUD 
14*35629363SAlbert ARIBAUD #ifndef __OPENRD_BASE_H
15*35629363SAlbert ARIBAUD #define __OPENRD_BASE_H
16*35629363SAlbert ARIBAUD 
17*35629363SAlbert ARIBAUD #define OPENRD_OE_LOW		(~(1<<28))        /* RS232 / RS485 */
18*35629363SAlbert ARIBAUD #define OPENRD_OE_HIGH		(~(1<<2))         /* SD / UART1 */
19*35629363SAlbert ARIBAUD #define OPENRD_OE_VAL_LOW		(0)       /* Sel RS232 */
20*35629363SAlbert ARIBAUD #define OPENRD_OE_VAL_HIGH		(1 << 2)  /* Sel SD */
21*35629363SAlbert ARIBAUD 
22*35629363SAlbert ARIBAUD /* PHY related */
23*35629363SAlbert ARIBAUD #define MV88E1116_LED_FCTRL_REG		10
24*35629363SAlbert ARIBAUD #define MV88E1116_CPRSP_CR3_REG		21
25*35629363SAlbert ARIBAUD #define MV88E1116_MAC_CTRL_REG		21
26*35629363SAlbert ARIBAUD #define MV88E1116_PGADR_REG		22
27*35629363SAlbert ARIBAUD #define MV88E1116_RGMII_TXTM_CTRL	(1 << 4)
28*35629363SAlbert ARIBAUD #define MV88E1116_RGMII_RXTM_CTRL	(1 << 5)
29*35629363SAlbert ARIBAUD 
30*35629363SAlbert ARIBAUD #endif /* __OPENRD_BASE_H */
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