xref: /rk3399_rockchip-uboot/board/Marvell/gplugd/gplugd.c (revision aa0ecfeb9d60d82e095daa0d6271f77b2c25d3fb)
126749582SAjay Bhargav /*
226749582SAjay Bhargav  * (C) Copyright 2011
326749582SAjay Bhargav  * eInfochips Ltd. <www.einfochips.com>
426749582SAjay Bhargav  * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
526749582SAjay Bhargav  *
626749582SAjay Bhargav  * Based on Aspenite:
726749582SAjay Bhargav  * (C) Copyright 2010
826749582SAjay Bhargav  * Marvell Semiconductor <www.marvell.com>
926749582SAjay Bhargav  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
1026749582SAjay Bhargav  * Contributor: Mahavir Jain <mjain@marvell.com>
1126749582SAjay Bhargav  *
1226749582SAjay Bhargav  * See file CREDITS for list of people who contributed to this
1326749582SAjay Bhargav  * project.
1426749582SAjay Bhargav  *
1526749582SAjay Bhargav  * This program is free software; you can redistribute it and/or
1626749582SAjay Bhargav  * modify it under the terms of the GNU General Public License as
1726749582SAjay Bhargav  * published by the Free Software Foundation; either version 2 of
1826749582SAjay Bhargav  * the License, or (at your option) any later version.
1926749582SAjay Bhargav  *
2026749582SAjay Bhargav  * This program is distributed in the hope that it will be useful,
2126749582SAjay Bhargav  * but WITHOUT ANY WARRANTY; without even the implied warranty of
2226749582SAjay Bhargav  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2326749582SAjay Bhargav  * GNU General Public License for more details.
2426749582SAjay Bhargav  *
2526749582SAjay Bhargav  * You should have received a copy of the GNU General Public License
2626749582SAjay Bhargav  * along with this program; if not, write to the Free Software
2726749582SAjay Bhargav  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
2826749582SAjay Bhargav  * MA 02110-1301 USA
2926749582SAjay Bhargav  */
3026749582SAjay Bhargav 
3126749582SAjay Bhargav #include <common.h>
3226749582SAjay Bhargav #include <mvmfp.h>
3326749582SAjay Bhargav #include <asm/arch/mfp.h>
3426749582SAjay Bhargav #include <asm/arch/armada100.h>
3526749582SAjay Bhargav 
36*aa0ecfebSAjay Bhargav #ifdef CONFIG_ARMADA100_FEC
37*aa0ecfebSAjay Bhargav #include <net.h>
38*aa0ecfebSAjay Bhargav #include <netdev.h>
39*aa0ecfebSAjay Bhargav #endif /* CONFIG_ARMADA100_FEC */
40*aa0ecfebSAjay Bhargav 
4126749582SAjay Bhargav DECLARE_GLOBAL_DATA_PTR;
4226749582SAjay Bhargav 
4326749582SAjay Bhargav int board_early_init_f(void)
4426749582SAjay Bhargav {
4526749582SAjay Bhargav 	u32 mfp_cfg[] = {
4626749582SAjay Bhargav 		/* I2C */
4726749582SAjay Bhargav 		MFP105_CI2C_SDA,
4826749582SAjay Bhargav 		MFP106_CI2C_SCL,
4926749582SAjay Bhargav 
5026749582SAjay Bhargav 		/* Enable Console on UART3 */
5126749582SAjay Bhargav 		MFPO8_UART3_TXD,
5226749582SAjay Bhargav 		MFPO9_UART3_RXD,
53*aa0ecfebSAjay Bhargav 
54*aa0ecfebSAjay Bhargav 		/* Ethernet PHY Interface */
55*aa0ecfebSAjay Bhargav 		MFP086_ETH_TXCLK,
56*aa0ecfebSAjay Bhargav 		MFP087_ETH_TXEN,
57*aa0ecfebSAjay Bhargav 		MFP088_ETH_TXDQ3,
58*aa0ecfebSAjay Bhargav 		MFP089_ETH_TXDQ2,
59*aa0ecfebSAjay Bhargav 		MFP090_ETH_TXDQ1,
60*aa0ecfebSAjay Bhargav 		MFP091_ETH_TXDQ0,
61*aa0ecfebSAjay Bhargav 		MFP092_ETH_CRS,
62*aa0ecfebSAjay Bhargav 		MFP093_ETH_COL,
63*aa0ecfebSAjay Bhargav 		MFP094_ETH_RXCLK,
64*aa0ecfebSAjay Bhargav 		MFP095_ETH_RXER,
65*aa0ecfebSAjay Bhargav 		MFP096_ETH_RXDQ3,
66*aa0ecfebSAjay Bhargav 		MFP097_ETH_RXDQ2,
67*aa0ecfebSAjay Bhargav 		MFP098_ETH_RXDQ1,
68*aa0ecfebSAjay Bhargav 		MFP099_ETH_RXDQ0,
69*aa0ecfebSAjay Bhargav 		MFP100_ETH_MDC,
70*aa0ecfebSAjay Bhargav 		MFP101_ETH_MDIO,
71*aa0ecfebSAjay Bhargav 		MFP103_ETH_RXDV,
72*aa0ecfebSAjay Bhargav 
7326749582SAjay Bhargav 		MFP_EOC		/*End of configuration*/
7426749582SAjay Bhargav 	};
7526749582SAjay Bhargav 	/* configure MFP's */
7626749582SAjay Bhargav 	mfp_config(mfp_cfg);
7726749582SAjay Bhargav 	return 0;
7826749582SAjay Bhargav }
7926749582SAjay Bhargav 
8026749582SAjay Bhargav int board_init(void)
8126749582SAjay Bhargav {
8226749582SAjay Bhargav 	/* arch number of Board */
8326749582SAjay Bhargav 	gd->bd->bi_arch_number = MACH_TYPE_SHEEVAD;
8426749582SAjay Bhargav 	/* adress of boot parameters */
8526749582SAjay Bhargav 	gd->bd->bi_boot_params = armd1_sdram_base(0) + 0x100;
8626749582SAjay Bhargav 	return 0;
8726749582SAjay Bhargav }
88*aa0ecfebSAjay Bhargav 
89*aa0ecfebSAjay Bhargav #ifdef CONFIG_ARMADA100_FEC
90*aa0ecfebSAjay Bhargav int board_eth_init(bd_t *bis)
91*aa0ecfebSAjay Bhargav {
92*aa0ecfebSAjay Bhargav 	struct armd1apmu_registers *apmu_regs =
93*aa0ecfebSAjay Bhargav 		(struct armd1apmu_registers *)ARMD1_APMU_BASE;
94*aa0ecfebSAjay Bhargav 
95*aa0ecfebSAjay Bhargav 	/* Enable clock of ethernet controller */
96*aa0ecfebSAjay Bhargav 	writel(FE_CLK_RST | FE_CLK_ENA, &apmu_regs->fecrc);
97*aa0ecfebSAjay Bhargav 
98*aa0ecfebSAjay Bhargav 	return armada100_fec_register(ARMD1_FEC_BASE);
99*aa0ecfebSAjay Bhargav }
100*aa0ecfebSAjay Bhargav #endif /* CONFIG_ARMADA100_FEC */
101