xref: /rk3399_rockchip-uboot/board/LaCie/netspace_v2/netspace_v2.c (revision 5628fb75d10764c377bd7eef9dfb4476f2398ff7)
1 /*
2  * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
3  *
4  * Based on Kirkwood support:
5  * (C) Copyright 2009
6  * Marvell Semiconductor <www.marvell.com>
7  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20  * GNU General Public License for more details.
21  */
22 
23 #include <common.h>
24 #include <miiphy.h>
25 #include <netdev.h>
26 #include <command.h>
27 #include <i2c.h>
28 #include <asm/arch/cpu.h>
29 #include <asm/arch/kirkwood.h>
30 #include <asm/arch/mpp.h>
31 #include <asm/arch/gpio.h>
32 #include "netspace_v2.h"
33 
34 DECLARE_GLOBAL_DATA_PTR;
35 
36 int board_early_init_f(void)
37 {
38 	/* Gpio configuration */
39 	kw_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
40 			NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
41 
42 	/* Multi-Purpose Pins Functionality configuration */
43 	u32 kwmpp_config[] = {
44 		MPP0_SPI_SCn,
45 		MPP1_SPI_MOSI,
46 		MPP2_SPI_SCK,
47 		MPP3_SPI_MISO,
48 		MPP4_NF_IO6,
49 		MPP5_NF_IO7,
50 		MPP6_SYSRST_OUTn,
51 		MPP7_GPO,		/* Fan speed (bit 1) */
52 		MPP8_TW_SDA,
53 		MPP9_TW_SCK,
54 		MPP10_UART0_TXD,
55 		MPP11_UART0_RXD,
56 		MPP12_GPO,		/* Red led */
57 		MPP14_GPIO,		/* USB fuse */
58 		MPP16_GPIO,		/* SATA 0 power */
59 		MPP17_GPIO,		/* SATA 1 power */
60 		MPP18_NF_IO0,
61 		MPP19_NF_IO1,
62 		MPP20_SATA1_ACTn,
63 		MPP21_SATA0_ACTn,
64 		MPP22_GPIO,		/* Fan speed (bit 0) */
65 		MPP23_GPIO,		/* Fan power */
66 		MPP24_GPIO,		/* USB mode select */
67 		MPP25_GPIO,		/* Fan rotation fail */
68 		MPP26_GPIO,		/* USB vbus-in detection */
69 		MPP28_GPIO,		/* USB enable vbus-out */
70 		MPP29_GPIO,		/* Blue led (slow register) */
71 		MPP30_GPIO,		/* Blue led (command register) */
72 		MPP31_GPIO,		/* Board power off */
73 		MPP32_GPIO,		/* Button (0 = Released, 1 = Pushed) */
74 		MPP33_GPIO,		/* Fan speed (bit 2) */
75 		0
76 	};
77 	kirkwood_mpp_conf(kwmpp_config);
78 
79 	return 0;
80 }
81 
82 int board_init(void)
83 {
84 	/* Machine number */
85 	gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
86 
87 	/* Boot parameters address */
88 	gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
89 
90 	return 0;
91 }
92 
93 int misc_init_r(void)
94 {
95 #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
96 	if (!getenv("ethaddr")) {
97 		ushort version;
98 		uchar mac[6];
99 		int ret;
100 
101 		/* I2C-0 for on-board EEPROM */
102 		i2c_set_bus_num(0);
103 
104 		/* Check layout version for EEPROM data */
105 		ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
106 				CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
107 				(uchar *) &version, 2);
108 		if (ret != 0) {
109 			printf("Error: failed to read I2C EEPROM @%02x\n",
110 				CONFIG_SYS_I2C_EEPROM_ADDR);
111 			return ret;
112 		}
113 		version = be16_to_cpu(version);
114 		if (version < 1 || version > 3) {
115 			printf("Error: unknown version %d for EEPROM data\n",
116 				version);
117 			return -1;
118 		}
119 
120 		/* Read Ethernet MAC address from EEPROM */
121 		ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 2,
122 				CONFIG_SYS_I2C_EEPROM_ADDR_LEN, mac, 6);
123 		if (ret != 0) {
124 			printf("Error: failed to read I2C EEPROM @%02x\n",
125 				CONFIG_SYS_I2C_EEPROM_ADDR);
126 			return ret;
127 		}
128 		eth_setenv_enetaddr("ethaddr", mac);
129 	}
130 #endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_EEPROM_ADDR */
131 
132 	return 0;
133 }
134 
135 void mv_phy_88e1116_init(char *name)
136 {
137 	u16 reg;
138 	u16 devadr;
139 
140 	if (miiphy_set_current_dev(name))
141 		return;
142 
143 	/* command to read PHY dev address */
144 	if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
145 		printf("Err..(%s) could not read PHY dev address\n", __func__);
146 		return;
147 	}
148 
149 	/*
150 	 * Enable RGMII delay on Tx and Rx for CPU port
151 	 * Ref: sec 4.7.2 of chip datasheet
152 	 */
153 	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
154 	miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
155 	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
156 	miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
157 	miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
158 
159 	/* reset the phy */
160 	if (miiphy_read(name, devadr, MII_BMCR, &reg) != 0) {
161 		printf("Err..(%s) PHY status read failed\n", __func__);
162 		return;
163 	}
164 	if (miiphy_write(name, devadr, MII_BMCR, reg | 0x8000) != 0) {
165 		printf("Err..(%s) PHY reset failed\n", __func__);
166 		return;
167 	}
168 
169 	debug("88E1116 Initialized on %s\n", name);
170 }
171 
172 /* Configure and initialize PHY */
173 void reset_phy(void)
174 {
175 	mv_phy_88e1116_init("egiga0");
176 }
177 
178 /* Return GPIO button status */
179 static int
180 do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
181 {
182 	return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON);
183 }
184 
185 U_BOOT_CMD(button, 1, 1, do_read_button,
186 	   "Return GPIO button status 0=off 1=on", "");
187