xref: /rk3399_rockchip-uboot/board/LaCie/edminiv2/edminiv2.c (revision c62db35d52c6ba5f31ac36e690c58ec54b273298)
1ce9c227cSAlbert Aribaud /*
257b4bce9SAlbert ARIBAUD  * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
3ce9c227cSAlbert Aribaud  *
4ce9c227cSAlbert Aribaud  * (C) Copyright 2009
5ce9c227cSAlbert Aribaud  * Marvell Semiconductor <www.marvell.com>
6ce9c227cSAlbert Aribaud  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
7ce9c227cSAlbert Aribaud  *
81a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
9ce9c227cSAlbert Aribaud  */
10ce9c227cSAlbert Aribaud 
11ce9c227cSAlbert Aribaud #include <common.h>
12ce9c227cSAlbert Aribaud #include <miiphy.h>
13ce9c227cSAlbert Aribaud #include <asm/arch/orion5x.h>
1485e04b7aSWolfgang Denk #include "../common/common.h"
159608e7deSAlbert ARIBAUD #include <spl.h>
169608e7deSAlbert ARIBAUD #include <ns16550.h>
17*c62db35dSSimon Glass #include <asm/mach-types.h>
18ce9c227cSAlbert Aribaud 
19ce9c227cSAlbert Aribaud DECLARE_GLOBAL_DATA_PTR;
20ce9c227cSAlbert Aribaud 
board_init(void)21ce9c227cSAlbert Aribaud int board_init(void)
22ce9c227cSAlbert Aribaud {
23ce9c227cSAlbert Aribaud 	/* arch number of board */
24ce9c227cSAlbert Aribaud 	gd->bd->bi_arch_number = MACH_TYPE_EDMINI_V2;
25ce9c227cSAlbert Aribaud 
26ce9c227cSAlbert Aribaud 	/* boot parameter start at 256th byte of RAM base */
27ce9c227cSAlbert Aribaud 	gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
28ce9c227cSAlbert Aribaud 
29ce9c227cSAlbert Aribaud 	return 0;
30ce9c227cSAlbert Aribaud }
31ab9164d0SAlbert Aribaud 
32ab9164d0SAlbert Aribaud #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
33ab9164d0SAlbert Aribaud /* Configure and enable MV88E1116 PHY */
reset_phy(void)34ab9164d0SAlbert Aribaud void reset_phy(void)
35ab9164d0SAlbert Aribaud {
36c59c0857SSimon Guinot 	mv_phy_88e1116_init("egiga0", 8);
37ab9164d0SAlbert Aribaud }
38ab9164d0SAlbert Aribaud #endif /* CONFIG_RESET_PHY_R */
399608e7deSAlbert ARIBAUD 
409608e7deSAlbert ARIBAUD /*
419608e7deSAlbert ARIBAUD  * SPL serial setup and NOR boot device selection
429608e7deSAlbert ARIBAUD  */
439608e7deSAlbert ARIBAUD 
449608e7deSAlbert ARIBAUD #ifdef CONFIG_SPL_BUILD
459608e7deSAlbert ARIBAUD 
spl_board_init(void)469608e7deSAlbert ARIBAUD void spl_board_init(void)
479608e7deSAlbert ARIBAUD {
489608e7deSAlbert ARIBAUD 	preloader_console_init();
499608e7deSAlbert ARIBAUD }
509608e7deSAlbert ARIBAUD 
spl_boot_device(void)519608e7deSAlbert ARIBAUD u32 spl_boot_device(void)
529608e7deSAlbert ARIBAUD {
539608e7deSAlbert ARIBAUD 	return BOOT_DEVICE_NOR;
549608e7deSAlbert ARIBAUD }
559608e7deSAlbert ARIBAUD 
569608e7deSAlbert ARIBAUD #endif /* CONFIG_SPL_BUILD */
57