xref: /rk3399_rockchip-uboot/board/LaCie/common/cpld-gpio-bus.h (revision 326ea986ac150acdc7656d57fca647db80b50158)
1d5cc3f52SSimon Guinot /*
2d5cc3f52SSimon Guinot  * Copyright (C) 2013 Simon Guinot <simon.guinot@sequanux.org>
3d5cc3f52SSimon Guinot  *
4*1a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
5d5cc3f52SSimon Guinot  */
6d5cc3f52SSimon Guinot 
7d5cc3f52SSimon Guinot #ifndef _LACIE_CPLD_GPI0_BUS_H
8d5cc3f52SSimon Guinot #define _LACIE_CPLD_GPI0_BUS_H
9d5cc3f52SSimon Guinot 
10d5cc3f52SSimon Guinot struct cpld_gpio_bus {
11d5cc3f52SSimon Guinot 	unsigned *addr;
12d5cc3f52SSimon Guinot 	unsigned num_addr;
13d5cc3f52SSimon Guinot 	unsigned *data;
14d5cc3f52SSimon Guinot 	unsigned num_data;
15d5cc3f52SSimon Guinot 	unsigned enable;
16d5cc3f52SSimon Guinot };
17d5cc3f52SSimon Guinot 
18d5cc3f52SSimon Guinot void cpld_gpio_bus_write(struct cpld_gpio_bus *cpld_gpio_bus,
19d5cc3f52SSimon Guinot 			 unsigned addr, unsigned value);
20d5cc3f52SSimon Guinot 
21d5cc3f52SSimon Guinot #endif /* _LACIE_CPLD_GPI0_BUS_H */
22