xref: /rk3399_rockchip-uboot/board/BuR/common/common.c (revision 47c14227b85eb93fedfa59497326ae0bba0fb407)
1 /*
2  * common.c
3  *
4  * common board functions for B&R boards
5  *
6  * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
7  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  *
11  */
12 #include <version.h>
13 #include <common.h>
14 #include <errno.h>
15 #include <spl.h>
16 #include <asm/arch/cpu.h>
17 #include <asm/arch/hardware.h>
18 #include <asm/arch/omap.h>
19 #include <asm/arch/clock.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/sys_proto.h>
22 #include <asm/arch/mmc_host_def.h>
23 #include <asm/io.h>
24 #include <asm/gpio.h>
25 #include <i2c.h>
26 #include <miiphy.h>
27 #include <cpsw.h>
28 #include <power/tps65217.h>
29 #include <lcd.h>
30 #include <fs.h>
31 #ifdef CONFIG_USE_FDT
32   #include <fdt_support.h>
33 #endif
34 #include "bur_common.h"
35 #include "../../../drivers/video/am335x-fb.h"
36 
37 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
38 
39 DECLARE_GLOBAL_DATA_PTR;
40 
41 #ifdef CONFIG_USE_FDT
42   #define FDTPROP(b, c) fdt_getprop_u32_default(gd->fdt_blob, b, c, ~0UL)
43   #define PATHTIM "/panel/display-timings/default"
44   #define PATHINF "/panel/panel-info"
45 #endif
46 /* --------------------------------------------------------------------------*/
47 #if defined(CONFIG_LCD) && defined(CONFIG_AM335X_LCD) && \
48 	!defined(CONFIG_SPL_BUILD)
49 int load_lcdtiming(struct am335x_lcdpanel *panel)
50 {
51 	struct am335x_lcdpanel pnltmp;
52 #ifdef CONFIG_USE_FDT
53 	u32 dtbprop;
54 
55 	if (gd->fdt_blob == NULL) {
56 		printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
57 		return -1;
58 	}
59 	memcpy(&pnltmp, (void *)panel, sizeof(struct am335x_lcdpanel));
60 
61 	pnltmp.hactive = FDTPROP(PATHTIM, "hactive");
62 	pnltmp.vactive = FDTPROP(PATHTIM, "vactive");
63 	pnltmp.bpp = FDTPROP(PATHINF, "bpp");
64 	pnltmp.hfp = FDTPROP(PATHTIM, "hfront-porch");
65 	pnltmp.hbp = FDTPROP(PATHTIM, "hback-porch");
66 	pnltmp.hsw = FDTPROP(PATHTIM, "hsync-len");
67 	pnltmp.vfp = FDTPROP(PATHTIM, "vfront-porch");
68 	pnltmp.vbp = FDTPROP(PATHTIM, "vback-porch");
69 	pnltmp.vsw = FDTPROP(PATHTIM, "vsync-len");
70 	pnltmp.pup_delay = FDTPROP(PATHTIM, "pupdelay");
71 	pnltmp.pon_delay = FDTPROP(PATHTIM, "pondelay");
72 
73 	/* calc. proper clk-divisor */
74 	dtbprop = FDTPROP(PATHTIM, "clock-frequency");
75 	if (dtbprop != ~0UL)
76 		pnltmp.pxl_clk_div = 192000000 / dtbprop;
77 	else
78 		pnltmp.pxl_clk_div = ~0UL;
79 
80 	/* check polarity of control-signals */
81 	dtbprop = FDTPROP(PATHTIM, "hsync-active");
82 	if (dtbprop == 0)
83 		pnltmp.pol |= HSYNC_INVERT;
84 	dtbprop = FDTPROP(PATHTIM, "vsync-active");
85 	if (dtbprop == 0)
86 		pnltmp.pol |= VSYNC_INVERT;
87 	dtbprop = FDTPROP(PATHINF, "sync-ctrl");
88 	if (dtbprop == 1)
89 		pnltmp.pol |= HSVS_CONTROL;
90 	dtbprop = FDTPROP(PATHINF, "sync-edge");
91 	if (dtbprop == 1)
92 		pnltmp.pol |= HSVS_RISEFALL;
93 	dtbprop = FDTPROP(PATHTIM, "pixelclk-active");
94 	if (dtbprop == 0)
95 		pnltmp.pol |= PXCLK_INVERT;
96 	dtbprop = FDTPROP(PATHTIM, "de-active");
97 	if (dtbprop == 0)
98 		pnltmp.pol |= DE_INVERT;
99 #else
100 	pnltmp.hactive = getenv_ulong("ds1_hactive", 10, ~0UL);
101 	pnltmp.vactive = getenv_ulong("ds1_vactive", 10, ~0UL);
102 	pnltmp.bpp = getenv_ulong("ds1_bpp", 10, ~0UL);
103 	pnltmp.hfp = getenv_ulong("ds1_hfp", 10, ~0UL);
104 	pnltmp.hbp = getenv_ulong("ds1_hbp", 10, ~0UL);
105 	pnltmp.hsw = getenv_ulong("ds1_hsw", 10, ~0UL);
106 	pnltmp.vfp = getenv_ulong("ds1_vfp", 10, ~0UL);
107 	pnltmp.vbp = getenv_ulong("ds1_vbp", 10, ~0UL);
108 	pnltmp.vsw = getenv_ulong("ds1_vsw", 10, ~0UL);
109 	pnltmp.pxl_clk_div = getenv_ulong("ds1_pxlclkdiv", 10, ~0UL);
110 	pnltmp.pol = getenv_ulong("ds1_pol", 16, ~0UL);
111 	pnltmp.pup_delay = getenv_ulong("ds1_pupdelay", 10, ~0UL);
112 	pnltmp.pon_delay = getenv_ulong("ds1_tondelay", 10, ~0UL);
113 #endif
114 	if (
115 	   ~0UL == (pnltmp.hactive) ||
116 	   ~0UL == (pnltmp.vactive) ||
117 	   ~0UL == (pnltmp.bpp) ||
118 	   ~0UL == (pnltmp.hfp) ||
119 	   ~0UL == (pnltmp.hbp) ||
120 	   ~0UL == (pnltmp.hsw) ||
121 	   ~0UL == (pnltmp.vfp) ||
122 	   ~0UL == (pnltmp.vbp) ||
123 	   ~0UL == (pnltmp.vsw) ||
124 	   ~0UL == (pnltmp.pxl_clk_div) ||
125 	   ~0UL == (pnltmp.pol) ||
126 	   ~0UL == (pnltmp.pup_delay) ||
127 	   ~0UL == (pnltmp.pon_delay)
128 	   ) {
129 		puts("lcd-settings in env/dtb incomplete!\n");
130 		printf("display-timings:\n"
131 			"================\n"
132 			"hactive: %d\n"
133 			"vactive: %d\n"
134 			"bpp    : %d\n"
135 			"hfp    : %d\n"
136 			"hbp    : %d\n"
137 			"hsw    : %d\n"
138 			"vfp    : %d\n"
139 			"vbp    : %d\n"
140 			"vsw    : %d\n"
141 			"pxlclk : %d\n"
142 			"pol    : 0x%08x\n"
143 			"pondly : %d\n",
144 			pnltmp.hactive, pnltmp.vactive, pnltmp.bpp,
145 			pnltmp.hfp, pnltmp.hbp, pnltmp.hsw,
146 			pnltmp.vfp, pnltmp.vbp, pnltmp.vsw,
147 			pnltmp.pxl_clk_div, pnltmp.pol, pnltmp.pon_delay);
148 
149 		return -1;
150 	}
151 	debug("lcd-settings in env complete, taking over.\n");
152 	memcpy((void *)panel,
153 	       (void *)&pnltmp,
154 	       sizeof(struct am335x_lcdpanel));
155 
156 	return 0;
157 }
158 
159 #ifdef CONFIG_USE_FDT
160 static int load_devicetree(void)
161 {
162 	char *dtbname = getenv("dtb");
163 	char *dtbdev = getenv("dtbdev");
164 	char *dtppart = getenv("dtbpart");
165 	u32 dtbaddr = getenv_ulong("dtbaddr", 16, 0UL);
166 	int rc;
167 	loff_t dtbsize;
168 
169 	if (dtbaddr == 0) {
170 		printf("%s: don't have a valid <dtbaddr> in env!\n", __func__);
171 		return -1;
172 	}
173 	if (!dtbdev || !dtbdev || !dtbname) {
174 		printf("%s: <dtbdev>/<dtbpart>/<dtb> missing.\n", __func__);
175 		return -1;
176 	}
177 
178 	if (fs_set_blk_dev(dtbdev, dtppart, FS_TYPE_EXT)) {
179 		puts("load_devicetree: set_blk_dev failed.\n");
180 		return -1;
181 	}
182 	rc = fs_read(dtbname, (u32)dtbaddr, 0, 0, &dtbsize);
183 	if (rc == 0) {
184 		gd->fdt_blob = (void *)dtbaddr;
185 		gd->fdt_size = dtbsize;
186 		debug("loaded %d bytes of dtb onto 0x%08x\n",
187 		      (u32)dtbsize, (u32)gd->fdt_blob);
188 		return dtbsize;
189 	}
190 
191 	printf("%s: load dtb failed!\n", __func__);
192 	return -1;
193 }
194 
195 static const char *dtbmacaddr(u32 ifno)
196 {
197 	int node, len;
198 	char enet[16];
199 	const char *mac;
200 	const char *path;
201 
202 	if (gd->fdt_blob == NULL) {
203 		printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
204 		return NULL;
205 	}
206 
207 	node = fdt_path_offset(gd->fdt_blob, "/aliases");
208 	if (node < 0)
209 		return NULL;
210 
211 	sprintf(enet, "ethernet%d", ifno);
212 	path = fdt_getprop(gd->fdt_blob, node, enet, NULL);
213 	if (!path) {
214 		printf("no alias for %s\n", enet);
215 		return NULL;
216 	}
217 
218 	node = fdt_path_offset(gd->fdt_blob, path);
219 	mac = fdt_getprop(gd->fdt_blob, node, "mac-address", &len);
220 	if (mac && is_valid_ethaddr((u8 *)mac))
221 		return mac;
222 
223 	return NULL;
224 }
225 
226 static void br_summaryscreen_printdtb(char *prefix,
227 				       char *name,
228 				       char *suffix)
229 {
230 	char buf[32] = { 0 };
231 	const char *nodep = buf;
232 	char *mac = 0;
233 	int nodeoffset;
234 	int len;
235 
236 	if (gd->fdt_blob == NULL) {
237 		printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
238 		return;
239 	}
240 
241 	if (strcmp(name, "brmac1") == 0) {
242 		mac = (char *)dtbmacaddr(0);
243 		if (mac)
244 			sprintf(buf, "%pM", mac);
245 	} else if (strcmp(name, "brmac2") == 0) {
246 		mac =  (char *)dtbmacaddr(1);
247 		if (mac)
248 			sprintf(buf, "%pM", mac);
249 	} else {
250 		nodeoffset = fdt_path_offset(gd->fdt_blob,
251 					     "/factory-settings");
252 		if (nodeoffset < 0) {
253 			puts("no 'factory-settings' in dtb!\n");
254 			return;
255 		}
256 		nodep = fdt_getprop(gd->fdt_blob, nodeoffset, name, &len);
257 	}
258 	if (nodep && strlen(nodep) > 1)
259 		lcd_printf("%s %s %s", prefix, nodep, suffix);
260 	else
261 		lcd_printf("\n");
262 }
263 int ft_board_setup(void *blob, bd_t *bd)
264 {
265 	int nodeoffset;
266 
267 	nodeoffset = fdt_path_offset(blob, "/factory-settings");
268 	if (nodeoffset < 0) {
269 		puts("set bootloader version 'factory-settings' not in dtb!\n");
270 		return -1;
271 	}
272 	if (fdt_setprop(blob, nodeoffset, "bl-version",
273 			PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) {
274 		puts("set bootloader version 'bl-version' prop. not in dtb!\n");
275 		return -1;
276 	}
277 	return 0;
278 }
279 #else
280 
281 static void br_summaryscreen_printenv(char *prefix,
282 				       char *name, char *altname,
283 				       char *suffix)
284 {
285 	char *envval = getenv(name);
286 	if (0 != envval) {
287 		lcd_printf("%s %s %s", prefix, envval, suffix);
288 	} else if (0 != altname) {
289 		envval = getenv(altname);
290 		if (0 != envval)
291 			lcd_printf("%s %s %s", prefix, envval, suffix);
292 	} else {
293 		lcd_printf("\n");
294 	}
295 }
296 #endif
297 void br_summaryscreen(void)
298 {
299 #ifdef CONFIG_USE_FDT
300 	br_summaryscreen_printdtb(" - B&R -", "order-no", "-\n");
301 	br_summaryscreen_printdtb(" Serial/Rev :", "serial-no", " /");
302 	br_summaryscreen_printdtb(" ", "hw-revision", "\n");
303 	br_summaryscreen_printdtb(" MAC (IF1)  :", "brmac1", "\n");
304 	br_summaryscreen_printdtb(" MAC (IF2)  :", "brmac2", "\n");
305 	lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
306 	lcd_puts("\n");
307 #else
308 	br_summaryscreen_printenv(" - B&R -", "br_orderno", 0, "-\n");
309 	br_summaryscreen_printenv(" Serial/Rev :", "br_serial", 0, "\n");
310 	br_summaryscreen_printenv(" MAC (IF1)  :", "br_mac1", "ethaddr", "\n");
311 	br_summaryscreen_printenv(" MAC (IF2)  :", "br_mac2", 0, "\n");
312 	lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
313 	lcd_puts("\n");
314 #endif
315 }
316 
317 void lcdpower(int on)
318 {
319 	u32 pin, swval, i;
320 #ifdef CONFIG_USE_FDT
321 	if (gd->fdt_blob == NULL) {
322 		printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
323 		return;
324 	}
325 	pin = FDTPROP(PATHINF, "pwrpin");
326 #else
327 	pin = getenv_ulong("ds1_pwr", 16, ~0UL);
328 #endif
329 	if (pin == ~0UL) {
330 		puts("no pwrpin in dtb/env, cannot powerup display!\n");
331 		return;
332 	}
333 
334 	for (i = 0; i < 3; i++) {
335 		if (pin != 0) {
336 			swval = pin & 0x80 ? 0 : 1;
337 			if (on)
338 				gpio_direction_output(pin & 0x7F, swval);
339 			else
340 				gpio_direction_output(pin & 0x7F, !swval);
341 
342 			debug("switched pin %d to %d\n", pin & 0x7F, swval);
343 		}
344 		pin >>= 8;
345 	}
346 }
347 
348 vidinfo_t	panel_info = {
349 		.vl_col = 1366,	/*
350 				 * give full resolution for allocating enough
351 				 * memory
352 				 */
353 		.vl_row = 768,
354 		.vl_bpix = 5,
355 		.priv = 0
356 };
357 
358 void lcd_ctrl_init(void *lcdbase)
359 {
360 	struct am335x_lcdpanel lcd_panel;
361 #ifdef CONFIG_USE_FDT
362 	/* TODO: is there a better place to load the dtb ? */
363 	load_devicetree();
364 #endif
365 	memset(&lcd_panel, 0, sizeof(struct am335x_lcdpanel));
366 	if (load_lcdtiming(&lcd_panel) != 0)
367 		return;
368 
369 	lcd_panel.panel_power_ctrl = &lcdpower;
370 
371 	if (0 != am335xfb_init(&lcd_panel))
372 		printf("ERROR: failed to initialize video!");
373 	/*
374 	 * modifiy panel info to 'real' resolution, to operate correct with
375 	 * lcd-framework.
376 	 */
377 	panel_info.vl_col = lcd_panel.hactive;
378 	panel_info.vl_row = lcd_panel.vactive;
379 
380 	lcd_set_flush_dcache(1);
381 }
382 
383 void lcd_enable(void)
384 {
385 #ifdef CONFIG_USE_FDT
386 	if (gd->fdt_blob == NULL) {
387 		printf("%s: don't have a valid gd->fdt_blob!\n", __func__);
388 		return;
389 	}
390 	unsigned int driver = FDTPROP(PATHINF, "brightdrv");
391 	unsigned int bright = FDTPROP(PATHINF, "brightdef");
392 	unsigned int pwmfrq = FDTPROP(PATHINF, "brightfdim");
393 #else
394 	unsigned int driver = getenv_ulong("ds1_bright_drv", 16, 0UL);
395 	unsigned int bright = getenv_ulong("ds1_bright_def", 10, 50);
396 	unsigned int pwmfrq = getenv_ulong("ds1_pwmfreq", 10, ~0UL);
397 #endif
398 	unsigned int tmp;
399 	struct gptimer *const timerhw = (struct gptimer *)DM_TIMER6_BASE;
400 
401 	bright = bright != ~0UL ? bright : 50;
402 
403 	switch (driver) {
404 	case 0:	/* PMIC LED-Driver */
405 		/* brightness level */
406 		tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
407 				   TPS65217_WLEDCTRL2, bright, 0xFF);
408 		/* turn on light */
409 		tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
410 				   TPS65217_WLEDCTRL1, 0x0A, 0xFF);
411 		break;
412 	case 1: /* PWM using timer6 */
413 		if (pwmfrq != ~0UL) {
414 			timerhw->tiocp_cfg = TCFG_RESET;
415 			udelay(10);
416 			while (timerhw->tiocp_cfg & TCFG_RESET)
417 				;
418 			tmp = ~0UL-(V_OSCK/pwmfrq);	/* bottom value */
419 			timerhw->tldr = tmp;
420 			timerhw->tcrr = tmp;
421 			tmp = tmp + ((V_OSCK/pwmfrq)/100) * bright;
422 			timerhw->tmar = tmp;
423 			timerhw->tclr = (TCLR_PT | (2 << TCLR_TRG_SHIFT) |
424 					TCLR_CE | TCLR_AR | TCLR_ST);
425 		} else {
426 			puts("invalid pwmfrq in env/dtb! skip PWM-setup.\n");
427 		}
428 		break;
429 	default:
430 		puts("no suitable backlightdriver in env/dtb!\n");
431 		break;
432 	}
433 	br_summaryscreen();
434 }
435 #elif CONFIG_SPL_BUILD
436 #else
437 #error "LCD-support with a suitable FB-Driver is mandatory !"
438 #endif /* CONFIG_LCD */
439 
440 #ifdef CONFIG_SPL_BUILD
441 void pmicsetup(u32 mpupll)
442 {
443 	int mpu_vdd;
444 	int usb_cur_lim;
445 
446 	if (i2c_probe(TPS65217_CHIP_PM)) {
447 		puts("PMIC (0x24) not found! skip further initalization.\n");
448 		return;
449 	}
450 
451 	/* Get the frequency which is defined by device fuses */
452 	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
453 	printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);
454 
455 	if (0 != mpupll) {
456 		dpll_mpu_opp100.m = MPUPLL_M_1000;
457 		printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
458 	} else {
459 		puts("ok.\n");
460 	}
461 	/*
462 	 * Increase USB current limit to 1300mA or 1800mA and set
463 	 * the MPU voltage controller as needed.
464 	 */
465 	if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
466 		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
467 		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
468 	} else {
469 		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
470 		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
471 	}
472 
473 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
474 			       usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
475 		puts("tps65217_reg_write failure\n");
476 
477 	/* Set DCDC3 (CORE) voltage to 1.125V */
478 	if (tps65217_voltage_update(TPS65217_DEFDCDC3,
479 				    TPS65217_DCDC_VOLT_SEL_1125MV)) {
480 		puts("tps65217_voltage_update failure\n");
481 		return;
482 	}
483 
484 	/* Set CORE Frequencies to OPP100 */
485 	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
486 
487 	/* Set DCDC2 (MPU) voltage */
488 	if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
489 		puts("tps65217_voltage_update failure\n");
490 		return;
491 	}
492 
493 	/* Set LDO3 to 1.8V */
494 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
495 			       TPS65217_DEFLS1,
496 			       TPS65217_LDO_VOLTAGE_OUT_1_8,
497 			       TPS65217_LDO_MASK))
498 		puts("tps65217_reg_write failure\n");
499 	/* Set LDO4 to 3.3V */
500 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
501 			       TPS65217_DEFLS2,
502 			       TPS65217_LDO_VOLTAGE_OUT_3_3,
503 			       TPS65217_LDO_MASK))
504 		puts("tps65217_reg_write failure\n");
505 
506 	/* Set MPU Frequency to what we detected now that voltages are set */
507 	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
508 	/* Set PWR_EN bit in Status Register */
509 	tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
510 			   TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF);
511 }
512 
513 void set_uart_mux_conf(void)
514 {
515 	enable_uart0_pin_mux();
516 }
517 
518 void set_mux_conf_regs(void)
519 {
520 	enable_board_pin_mux();
521 }
522 
523 #endif /* CONFIG_SPL_BUILD */
524 
525 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
526 	(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
527 static void cpsw_control(int enabled)
528 {
529 	/* VTP can be added here */
530 	return;
531 }
532 
533 /* describing port offsets of TI's CPSW block */
534 static struct cpsw_slave_data cpsw_slaves[] = {
535 	{
536 		.slave_reg_ofs	= 0x208,
537 		.sliver_reg_ofs	= 0xd80,
538 		.phy_addr	= 1,
539 	},
540 	{
541 		.slave_reg_ofs	= 0x308,
542 		.sliver_reg_ofs	= 0xdc0,
543 		.phy_addr	= 2,
544 	},
545 };
546 
547 static struct cpsw_platform_data cpsw_data = {
548 	.mdio_base		= CPSW_MDIO_BASE,
549 	.cpsw_base		= CPSW_BASE,
550 	.mdio_div		= 0xff,
551 	.channels		= 8,
552 	.cpdma_reg_ofs		= 0x800,
553 	.slaves			= 1,
554 	.slave_data		= cpsw_slaves,
555 	.ale_reg_ofs		= 0xd00,
556 	.ale_entries		= 1024,
557 	.host_port_reg_ofs	= 0x108,
558 	.hw_stats_reg_ofs	= 0x900,
559 	.bd_ram_ofs		= 0x2000,
560 	.mac_control		= (1 << 5),
561 	.control		= cpsw_control,
562 	.host_port_num		= 0,
563 	.version		= CPSW_CTRL_VERSION_2,
564 };
565 #endif /* CONFIG_DRIVER_TI_CPSW, ... */
566 
567 #if defined(CONFIG_DRIVER_TI_CPSW)
568 
569 int board_eth_init(bd_t *bis)
570 {
571 	int rv = 0;
572 	char mac_addr[6];
573 	const char *mac = 0;
574 	uint32_t mac_hi, mac_lo;
575 	/* try reading mac address from efuse */
576 	mac_lo = readl(&cdev->macid0l);
577 	mac_hi = readl(&cdev->macid0h);
578 	mac_addr[0] = mac_hi & 0xFF;
579 	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
580 	mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
581 	mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
582 	mac_addr[4] = mac_lo & 0xFF;
583 	mac_addr[5] = (mac_lo & 0xFF00) >> 8;
584 
585 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
586 	(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
587 	if (!getenv("ethaddr")) {
588 		#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_FDT)
589 		printf("<ethaddr> not set. trying DTB ... ");
590 		mac = dtbmacaddr(0);
591 		#endif
592 		if (!mac) {
593 			printf("<ethaddr> not set. validating E-fuse MAC ... ");
594 			if (is_valid_ethaddr((const u8 *)mac_addr))
595 				mac = (const char *)mac_addr;
596 		}
597 
598 		if (mac) {
599 			printf("using: %pM on ", mac);
600 			eth_setenv_enetaddr("ethaddr", (const u8 *)mac);
601 		}
602 	}
603 	writel(MII_MODE_ENABLE, &cdev->miisel);
604 	cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
605 	cpsw_slaves[1].phy_if =	PHY_INTERFACE_MODE_MII;
606 
607 	rv = cpsw_register(&cpsw_data);
608 	if (rv < 0) {
609 		printf("Error %d registering CPSW switch\n", rv);
610 		return 0;
611 	}
612 #endif /* CONFIG_DRIVER_TI_CPSW, ... */
613 	return rv;
614 }
615 #endif /* CONFIG_DRIVER_TI_CPSW */
616 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
617 int board_mmc_init(bd_t *bis)
618 {
619 	return omap_mmc_init(1, 0, 0, -1, -1);
620 }
621 #endif
622 int overwrite_console(void)
623 {
624 	return 1;
625 }
626