xref: /rk3399_rockchip-uboot/board/BuR/common/common.c (revision 2b5b2be5e9444688e5d8bd0e2d263fccd1f2eee4)
1 /*
2  * common.c
3  *
4  * common board functions for B&R boards
5  *
6  * Copyright (C) 2013 Hannes Petermaier <oe5hpm@oevsv.at>
7  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  *
11  */
12 #include <version.h>
13 #include <common.h>
14 #include <errno.h>
15 #include <spl.h>
16 #include <asm/arch/cpu.h>
17 #include <asm/arch/hardware.h>
18 #include <asm/arch/omap.h>
19 #include <asm/arch/clock.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/sys_proto.h>
22 #include <asm/arch/mmc_host_def.h>
23 #include <asm/io.h>
24 #include <asm/gpio.h>
25 #include <i2c.h>
26 #include <miiphy.h>
27 #include <cpsw.h>
28 #include <power/tps65217.h>
29 #include <lcd.h>
30 #include <fs.h>
31 #ifdef CONFIG_USE_FDT
32   #include <fdt_support.h>
33 #endif
34 #include "bur_common.h"
35 #include "../../../drivers/video/am335x-fb.h"
36 
37 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
38 
39 DECLARE_GLOBAL_DATA_PTR;
40 
41 #ifdef CONFIG_USE_FDT
42   #define FDTPROP(a, b, c) fdt_getprop_u32_default((void *)a, b, c, ~0UL)
43   #define PATHTIM "/panel/display-timings/default"
44   #define PATHINF "/panel/panel-info"
45 #endif
46 /* --------------------------------------------------------------------------*/
47 #if defined(CONFIG_LCD) && defined(CONFIG_AM335X_LCD) && \
48 	!defined(CONFIG_SPL_BUILD)
49 int load_lcdtiming(struct am335x_lcdpanel *panel)
50 {
51 	struct am335x_lcdpanel pnltmp;
52 #ifdef CONFIG_USE_FDT
53 	u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
54 	u32 dtbprop;
55 
56 	if (dtbaddr == ~0UL) {
57 		puts("load_lcdtiming: failed to get 'dtbaddr' from env!\n");
58 		return -1;
59 	}
60 	memcpy(&pnltmp, (void *)panel, sizeof(struct am335x_lcdpanel));
61 
62 	pnltmp.hactive = FDTPROP(dtbaddr, PATHTIM, "hactive");
63 	pnltmp.vactive = FDTPROP(dtbaddr, PATHTIM, "vactive");
64 	pnltmp.bpp = FDTPROP(dtbaddr, PATHINF, "bpp");
65 	pnltmp.hfp = FDTPROP(dtbaddr, PATHTIM, "hfront-porch");
66 	pnltmp.hbp = FDTPROP(dtbaddr, PATHTIM, "hback-porch");
67 	pnltmp.hsw = FDTPROP(dtbaddr, PATHTIM, "hsync-len");
68 	pnltmp.vfp = FDTPROP(dtbaddr, PATHTIM, "vfront-porch");
69 	pnltmp.vbp = FDTPROP(dtbaddr, PATHTIM, "vback-porch");
70 	pnltmp.vsw = FDTPROP(dtbaddr, PATHTIM, "vsync-len");
71 	pnltmp.pup_delay = FDTPROP(dtbaddr, PATHTIM, "pupdelay");
72 	pnltmp.pon_delay = FDTPROP(dtbaddr, PATHTIM, "pondelay");
73 
74 	/* calc. proper clk-divisor */
75 	dtbprop = FDTPROP(dtbaddr, PATHTIM, "clock-frequency");
76 	if (dtbprop != ~0UL)
77 		pnltmp.pxl_clk_div = 192000000 / dtbprop;
78 	else
79 		pnltmp.pxl_clk_div = ~0UL;
80 
81 	/* check polarity of control-signals */
82 	dtbprop = FDTPROP(dtbaddr, PATHTIM, "hsync-active");
83 	if (dtbprop == 0)
84 		pnltmp.pol |= HSYNC_INVERT;
85 	dtbprop = FDTPROP(dtbaddr, PATHTIM, "vsync-active");
86 	if (dtbprop == 0)
87 		pnltmp.pol |= VSYNC_INVERT;
88 	dtbprop = FDTPROP(dtbaddr, PATHINF, "sync-ctrl");
89 	if (dtbprop == 1)
90 		pnltmp.pol |= HSVS_CONTROL;
91 	dtbprop = FDTPROP(dtbaddr, PATHINF, "sync-edge");
92 	if (dtbprop == 1)
93 		pnltmp.pol |= HSVS_RISEFALL;
94 	dtbprop = FDTPROP(dtbaddr, PATHTIM, "pixelclk-active");
95 	if (dtbprop == 0)
96 		pnltmp.pol |= PXCLK_INVERT;
97 	dtbprop = FDTPROP(dtbaddr, PATHTIM, "de-active");
98 	if (dtbprop == 0)
99 		pnltmp.pol |= DE_INVERT;
100 #else
101 	pnltmp.hactive = getenv_ulong("ds1_hactive", 10, ~0UL);
102 	pnltmp.vactive = getenv_ulong("ds1_vactive", 10, ~0UL);
103 	pnltmp.bpp = getenv_ulong("ds1_bpp", 10, ~0UL);
104 	pnltmp.hfp = getenv_ulong("ds1_hfp", 10, ~0UL);
105 	pnltmp.hbp = getenv_ulong("ds1_hbp", 10, ~0UL);
106 	pnltmp.hsw = getenv_ulong("ds1_hsw", 10, ~0UL);
107 	pnltmp.vfp = getenv_ulong("ds1_vfp", 10, ~0UL);
108 	pnltmp.vbp = getenv_ulong("ds1_vbp", 10, ~0UL);
109 	pnltmp.vsw = getenv_ulong("ds1_vsw", 10, ~0UL);
110 	pnltmp.pxl_clk_div = getenv_ulong("ds1_pxlclkdiv", 10, ~0UL);
111 	pnltmp.pol = getenv_ulong("ds1_pol", 16, ~0UL);
112 	pnltmp.pup_delay = getenv_ulong("ds1_pupdelay", 10, ~0UL);
113 	pnltmp.pon_delay = getenv_ulong("ds1_tondelay", 10, ~0UL);
114 #endif
115 	if (
116 	   ~0UL == (pnltmp.hactive) ||
117 	   ~0UL == (pnltmp.vactive) ||
118 	   ~0UL == (pnltmp.bpp) ||
119 	   ~0UL == (pnltmp.hfp) ||
120 	   ~0UL == (pnltmp.hbp) ||
121 	   ~0UL == (pnltmp.hsw) ||
122 	   ~0UL == (pnltmp.vfp) ||
123 	   ~0UL == (pnltmp.vbp) ||
124 	   ~0UL == (pnltmp.vsw) ||
125 	   ~0UL == (pnltmp.pxl_clk_div) ||
126 	   ~0UL == (pnltmp.pol) ||
127 	   ~0UL == (pnltmp.pup_delay) ||
128 	   ~0UL == (pnltmp.pon_delay)
129 	   ) {
130 		puts("lcd-settings in env/dtb incomplete!\n");
131 		printf("display-timings:\n"
132 			"================\n"
133 			"hactive: %d\n"
134 			"vactive: %d\n"
135 			"bpp    : %d\n"
136 			"hfp    : %d\n"
137 			"hbp    : %d\n"
138 			"hsw    : %d\n"
139 			"vfp    : %d\n"
140 			"vbp    : %d\n"
141 			"vsw    : %d\n"
142 			"pxlclk : %d\n"
143 			"pol    : 0x%08x\n"
144 			"pondly : %d\n",
145 			pnltmp.hactive, pnltmp.vactive, pnltmp.bpp,
146 			pnltmp.hfp, pnltmp.hbp, pnltmp.hsw,
147 			pnltmp.vfp, pnltmp.vbp, pnltmp.vsw,
148 			pnltmp.pxl_clk_div, pnltmp.pol, pnltmp.pon_delay);
149 
150 		return -1;
151 	}
152 	debug("lcd-settings in env complete, taking over.\n");
153 	memcpy((void *)panel,
154 	       (void *)&pnltmp,
155 	       sizeof(struct am335x_lcdpanel));
156 
157 	return 0;
158 }
159 
160 #ifdef CONFIG_USE_FDT
161 static int load_devicetree(void)
162 {
163 	char *dtbname = getenv("dtb");
164 	char *dtbdev = getenv("dtbdev");
165 	char *dtppart = getenv("dtbpart");
166 	u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
167 	loff_t dtbsize;
168 
169 	if (!dtbdev || !dtbdev) {
170 		puts("load_devicetree: <dtbdev>/<dtbpart> missing.\n");
171 		return -1;
172 	}
173 
174 	if (fs_set_blk_dev(dtbdev, dtppart, FS_TYPE_EXT)) {
175 		puts("load_devicetree: set_blk_dev failed.\n");
176 		return -1;
177 	}
178 	if (dtbname && dtbaddr != ~0UL) {
179 		if (fs_read(dtbname, dtbaddr, 0, 0, &dtbsize) == 0) {
180 			gd->fdt_blob = (void *)dtbaddr;
181 			gd->fdt_size = dtbsize;
182 			debug("loaded %d bytes of dtb onto 0x%08x\n",
183 			      (u32)dtbsize, dtbaddr);
184 			return dtbsize;
185 		}
186 		puts("load_devicetree: load dtb failed,file does not exist!\n");
187 	}
188 
189 	puts("load_devicetree: <dtb>/<dtbaddr> missing!\n");
190 	return -1;
191 }
192 
193 static const char *dtbmacaddr(u32 ifno)
194 {
195 	int node, len;
196 	char enet[16];
197 	const char *mac;
198 	const char *path;
199 	u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
200 
201 	if (dtbaddr == ~0UL) {
202 		puts("dtbmacaddr: failed to get 'dtbaddr' from env!\n");
203 		return NULL;
204 	}
205 
206 	node = fdt_path_offset((void *)dtbaddr, "/aliases");
207 	if (node < 0)
208 		return NULL;
209 
210 	sprintf(enet, "ethernet%d", ifno);
211 	path = fdt_getprop((void *)dtbaddr, node, enet, NULL);
212 	if (!path) {
213 		printf("no alias for %s\n", enet);
214 		return NULL;
215 	}
216 
217 	node = fdt_path_offset((void *)dtbaddr, path);
218 	mac = fdt_getprop((void *)dtbaddr, node, "mac-address", &len);
219 	if (mac && is_valid_ether_addr((u8 *)mac))
220 		return mac;
221 
222 	return NULL;
223 }
224 
225 static void br_summaryscreen_printdtb(char *prefix,
226 				       char *name,
227 				       char *suffix)
228 {
229 	u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
230 	char buf[32] = { 0 };
231 	const char *nodep = buf;
232 	char *mac = 0;
233 	int nodeoffset;
234 	int len;
235 
236 	if (dtbaddr == ~0UL) {
237 		puts("br_summaryscreen: failed to get 'dtbaddr' from env!\n");
238 		return;
239 	}
240 
241 	if (strcmp(name, "brmac1") == 0) {
242 		mac = (char *)dtbmacaddr(0);
243 		if (mac)
244 			sprintf(buf, "%pM", mac);
245 	} else if (strcmp(name, "brmac2") == 0) {
246 		mac =  (char *)dtbmacaddr(1);
247 		if (mac)
248 			sprintf(buf, "%pM", mac);
249 	} else {
250 		nodeoffset = fdt_path_offset((void *)dtbaddr,
251 					     "/factory-settings");
252 		if (nodeoffset < 0) {
253 			puts("no 'factory-settings' in dtb!\n");
254 			return;
255 		}
256 		nodep = fdt_getprop((void *)dtbaddr, nodeoffset, name, &len);
257 	}
258 	if (nodep && strlen(nodep) > 1)
259 		lcd_printf("%s %s %s", prefix, nodep, suffix);
260 	else
261 		lcd_printf("\n");
262 }
263 int ft_board_setup(void *blob, bd_t *bd)
264 {
265 	int nodeoffset;
266 
267 	nodeoffset = fdt_path_offset(blob, "/factory-settings");
268 	if (nodeoffset < 0) {
269 		puts("set bootloader version 'factory-settings' not in dtb!\n");
270 		return -1;
271 	}
272 	if (fdt_setprop(blob, nodeoffset, "bl-version",
273 			PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) {
274 		puts("set bootloader version 'bl-version' prop. not in dtb!\n");
275 		return -1;
276 	}
277 	return 0;
278 }
279 #else
280 
281 static void br_summaryscreen_printenv(char *prefix,
282 				       char *name, char *altname,
283 				       char *suffix)
284 {
285 	char *envval = getenv(name);
286 	if (0 != envval) {
287 		lcd_printf("%s %s %s", prefix, envval, suffix);
288 	} else if (0 != altname) {
289 		envval = getenv(altname);
290 		if (0 != envval)
291 			lcd_printf("%s %s %s", prefix, envval, suffix);
292 	} else {
293 		lcd_printf("\n");
294 	}
295 }
296 #endif
297 void br_summaryscreen(void)
298 {
299 #ifdef CONFIG_USE_FDT
300 	br_summaryscreen_printdtb(" - B&R -", "order-no", "-\n");
301 	br_summaryscreen_printdtb(" Serial/Rev :", "serial-no", " /");
302 	br_summaryscreen_printdtb(" ", "hw-revision", "\n");
303 	br_summaryscreen_printdtb(" MAC (IF1)  :", "brmac1", "\n");
304 	br_summaryscreen_printdtb(" MAC (IF2)  :", "brmac2", "\n");
305 	lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
306 	lcd_puts("\n");
307 #else
308 	br_summaryscreen_printenv(" - B&R -", "br_orderno", 0, "-\n");
309 	br_summaryscreen_printenv(" Serial/Rev :", "br_serial", 0, "\n");
310 	br_summaryscreen_printenv(" MAC (IF1)  :", "br_mac1", "ethaddr", "\n");
311 	br_summaryscreen_printenv(" MAC (IF2)  :", "br_mac2", 0, "\n");
312 	lcd_puts(" Bootloader : " PLAIN_VERSION "\n");
313 	lcd_puts("\n");
314 #endif
315 }
316 
317 void lcdpower(int on)
318 {
319 	u32 pin, swval, i;
320 #ifdef CONFIG_USE_FDT
321 	u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
322 
323 	if (dtbaddr == ~0UL) {
324 		puts("lcdpower: failed to get 'dtbaddr' from env!\n");
325 		return;
326 	}
327 	pin = FDTPROP(dtbaddr, PATHINF, "pwrpin");
328 #else
329 	pin = getenv_ulong("ds1_pwr", 16, ~0UL);
330 #endif
331 	if (pin == ~0UL) {
332 		puts("no pwrpin in dtb/env, cannot powerup display!\n");
333 		return;
334 	}
335 
336 	for (i = 0; i < 3; i++) {
337 		if (pin != 0) {
338 			swval = pin & 0x80 ? 0 : 1;
339 			if (on)
340 				gpio_direction_output(pin & 0x7F, swval);
341 			else
342 				gpio_direction_output(pin & 0x7F, !swval);
343 
344 			debug("switched pin %d to %d\n", pin & 0x7F, swval);
345 		}
346 		pin >>= 8;
347 	}
348 }
349 
350 vidinfo_t	panel_info = {
351 		.vl_col = 1366,	/*
352 				 * give full resolution for allocating enough
353 				 * memory
354 				 */
355 		.vl_row = 768,
356 		.vl_bpix = 5,
357 		.priv = 0
358 };
359 
360 void lcd_ctrl_init(void *lcdbase)
361 {
362 	struct am335x_lcdpanel lcd_panel;
363 #ifdef CONFIG_USE_FDT
364 	/* TODO: is there a better place to load the dtb ? */
365 	load_devicetree();
366 #endif
367 	memset(&lcd_panel, 0, sizeof(struct am335x_lcdpanel));
368 	if (load_lcdtiming(&lcd_panel) != 0)
369 		return;
370 
371 	lcd_panel.panel_power_ctrl = &lcdpower;
372 
373 	if (0 != am335xfb_init(&lcd_panel))
374 		printf("ERROR: failed to initialize video!");
375 	/*
376 	 * modifiy panel info to 'real' resolution, to operate correct with
377 	 * lcd-framework.
378 	 */
379 	panel_info.vl_col = lcd_panel.hactive;
380 	panel_info.vl_row = lcd_panel.vactive;
381 
382 	lcd_set_flush_dcache(1);
383 }
384 
385 void lcd_enable(void)
386 {
387 #ifdef CONFIG_USE_FDT
388 	u32 dtbaddr = getenv_ulong("dtbaddr", 16, ~0UL);
389 
390 	if (dtbaddr == ~0UL) {
391 		puts("lcdpower: failed to get 'dtbaddr' from env!\n");
392 		return;
393 	}
394 	unsigned int driver = FDTPROP(dtbaddr, PATHINF, "brightdrv");
395 	unsigned int bright = FDTPROP(dtbaddr, PATHINF, "brightdef");
396 	unsigned int pwmfrq = FDTPROP(dtbaddr, PATHINF, "brightfdim");
397 #else
398 	unsigned int driver = getenv_ulong("ds1_bright_drv", 16, 0UL);
399 	unsigned int bright = getenv_ulong("ds1_bright_def", 10, 50);
400 	unsigned int pwmfrq = getenv_ulong("ds1_pwmfreq", 10, ~0UL);
401 #endif
402 	unsigned int tmp;
403 	struct gptimer *const timerhw = (struct gptimer *)DM_TIMER6_BASE;
404 
405 	bright = bright != ~0UL ? bright : 50;
406 
407 	switch (driver) {
408 	case 0:	/* PMIC LED-Driver */
409 		/* brightness level */
410 		tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
411 				   TPS65217_WLEDCTRL2, bright, 0xFF);
412 		/* turn on light */
413 		tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
414 				   TPS65217_WLEDCTRL1, 0x0A, 0xFF);
415 		break;
416 	case 1: /* PWM using timer6 */
417 		if (pwmfrq != ~0UL) {
418 			timerhw->tiocp_cfg = TCFG_RESET;
419 			udelay(10);
420 			while (timerhw->tiocp_cfg & TCFG_RESET)
421 				;
422 			tmp = ~0UL-(V_OSCK/pwmfrq);	/* bottom value */
423 			timerhw->tldr = tmp;
424 			timerhw->tcrr = tmp;
425 			tmp = tmp + ((V_OSCK/pwmfrq)/100) * bright;
426 			timerhw->tmar = tmp;
427 			timerhw->tclr = (TCLR_PT | (2 << TCLR_TRG_SHIFT) |
428 					TCLR_CE | TCLR_AR | TCLR_ST);
429 		} else {
430 			puts("invalid pwmfrq in env/dtb! skip PWM-setup.\n");
431 		}
432 		break;
433 	default:
434 		puts("no suitable backlightdriver in env/dtb!\n");
435 		break;
436 	}
437 	br_summaryscreen();
438 }
439 #elif CONFIG_SPL_BUILD
440 #else
441 #error "LCD-support with a suitable FB-Driver is mandatory !"
442 #endif /* CONFIG_LCD */
443 
444 void blink(u32 blinks, u32 intervall, u32 pin)
445 {
446 	gpio_direction_output(pin, 0);
447 	int val = 0;
448 
449 	do {
450 		val ^= 0x01;
451 		gpio_set_value(pin, val);
452 		mdelay(intervall);
453 	} while (blinks--);
454 
455 	gpio_set_value(pin, 0);
456 }
457 
458 #ifdef CONFIG_SPL_BUILD
459 void pmicsetup(u32 mpupll)
460 {
461 	int mpu_vdd;
462 	int usb_cur_lim;
463 
464 	if (i2c_probe(TPS65217_CHIP_PM)) {
465 		puts("PMIC (0x24) not found! skip further initalization.\n");
466 		return;
467 	}
468 
469 	/* Get the frequency which is defined by device fuses */
470 	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
471 	printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);
472 
473 	if (0 != mpupll) {
474 		dpll_mpu_opp100.m = MPUPLL_M_1000;
475 		printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
476 	} else {
477 		puts("ok.\n");
478 	}
479 	/*
480 	 * Increase USB current limit to 1300mA or 1800mA and set
481 	 * the MPU voltage controller as needed.
482 	 */
483 	if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
484 		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
485 		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
486 	} else {
487 		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
488 		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
489 	}
490 
491 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
492 			       usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
493 		puts("tps65217_reg_write failure\n");
494 
495 	/* Set DCDC3 (CORE) voltage to 1.125V */
496 	if (tps65217_voltage_update(TPS65217_DEFDCDC3,
497 				    TPS65217_DCDC_VOLT_SEL_1125MV)) {
498 		puts("tps65217_voltage_update failure\n");
499 		return;
500 	}
501 
502 	/* Set CORE Frequencies to OPP100 */
503 	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
504 
505 	/* Set DCDC2 (MPU) voltage */
506 	if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
507 		puts("tps65217_voltage_update failure\n");
508 		return;
509 	}
510 
511 	/* Set LDO3 to 1.8V */
512 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
513 			       TPS65217_DEFLS1,
514 			       TPS65217_LDO_VOLTAGE_OUT_1_8,
515 			       TPS65217_LDO_MASK))
516 		puts("tps65217_reg_write failure\n");
517 	/* Set LDO4 to 3.3V */
518 	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
519 			       TPS65217_DEFLS2,
520 			       TPS65217_LDO_VOLTAGE_OUT_3_3,
521 			       TPS65217_LDO_MASK))
522 		puts("tps65217_reg_write failure\n");
523 
524 	/* Set MPU Frequency to what we detected now that voltages are set */
525 	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
526 	/* Set PWR_EN bit in Status Register */
527 	tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
528 			   TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF);
529 }
530 
531 void set_uart_mux_conf(void)
532 {
533 	enable_uart0_pin_mux();
534 }
535 
536 void set_mux_conf_regs(void)
537 {
538 	enable_board_pin_mux();
539 }
540 
541 #endif /* CONFIG_SPL_BUILD */
542 
543 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
544 	(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
545 static void cpsw_control(int enabled)
546 {
547 	/* VTP can be added here */
548 	return;
549 }
550 
551 /* describing port offsets of TI's CPSW block */
552 static struct cpsw_slave_data cpsw_slaves[] = {
553 	{
554 		.slave_reg_ofs	= 0x208,
555 		.sliver_reg_ofs	= 0xd80,
556 		.phy_addr	= 1,
557 	},
558 	{
559 		.slave_reg_ofs	= 0x308,
560 		.sliver_reg_ofs	= 0xdc0,
561 		.phy_addr	= 2,
562 	},
563 };
564 
565 static struct cpsw_platform_data cpsw_data = {
566 	.mdio_base		= CPSW_MDIO_BASE,
567 	.cpsw_base		= CPSW_BASE,
568 	.mdio_div		= 0xff,
569 	.channels		= 8,
570 	.cpdma_reg_ofs		= 0x800,
571 	.slaves			= 1,
572 	.slave_data		= cpsw_slaves,
573 	.ale_reg_ofs		= 0xd00,
574 	.ale_entries		= 1024,
575 	.host_port_reg_ofs	= 0x108,
576 	.hw_stats_reg_ofs	= 0x900,
577 	.bd_ram_ofs		= 0x2000,
578 	.mac_control		= (1 << 5),
579 	.control		= cpsw_control,
580 	.host_port_num		= 0,
581 	.version		= CPSW_CTRL_VERSION_2,
582 };
583 #endif /* CONFIG_DRIVER_TI_CPSW, ... */
584 
585 #if defined(CONFIG_DRIVER_TI_CPSW)
586 
587 int board_eth_init(bd_t *bis)
588 {
589 	int rv = 0;
590 	char mac_addr[6];
591 	const char *mac = 0;
592 	uint32_t mac_hi, mac_lo;
593 	/* try reading mac address from efuse */
594 	mac_lo = readl(&cdev->macid0l);
595 	mac_hi = readl(&cdev->macid0h);
596 	mac_addr[0] = mac_hi & 0xFF;
597 	mac_addr[1] = (mac_hi & 0xFF00) >> 8;
598 	mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
599 	mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
600 	mac_addr[4] = mac_lo & 0xFF;
601 	mac_addr[5] = (mac_lo & 0xFF00) >> 8;
602 
603 #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
604 	(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
605 	if (!getenv("ethaddr")) {
606 		#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_FDT)
607 		printf("<ethaddr> not set. trying DTB ... ");
608 		mac = dtbmacaddr(0);
609 		#endif
610 		if (!mac) {
611 			printf("<ethaddr> not set. validating E-fuse MAC ... ");
612 			if (is_valid_ether_addr((const u8 *)mac_addr))
613 				mac = (const char *)mac_addr;
614 		}
615 
616 		if (mac) {
617 			printf("using: %pM on ", mac);
618 			eth_setenv_enetaddr("ethaddr", (const u8 *)mac);
619 		}
620 	}
621 	writel(MII_MODE_ENABLE, &cdev->miisel);
622 	cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
623 	cpsw_slaves[1].phy_if =	PHY_INTERFACE_MODE_MII;
624 
625 	rv = cpsw_register(&cpsw_data);
626 	if (rv < 0) {
627 		printf("Error %d registering CPSW switch\n", rv);
628 		return 0;
629 	}
630 #endif /* CONFIG_DRIVER_TI_CPSW, ... */
631 	return rv;
632 }
633 #endif /* CONFIG_DRIVER_TI_CPSW */
634 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
635 int board_mmc_init(bd_t *bis)
636 {
637 	return omap_mmc_init(1, 0, 0, -1, -1);
638 }
639 #endif
640 int overwrite_console(void)
641 {
642 	return 1;
643 }
644