1843a7ee8SRaphael Assenat /* 2843a7ee8SRaphael Assenat * eco5pk.c - board file for 8D Technology's AM3517 based eco5pk board 3843a7ee8SRaphael Assenat * 4843a7ee8SRaphael Assenat * Based on am3517evm.c 5843a7ee8SRaphael Assenat * 6843a7ee8SRaphael Assenat * Copyright (C) 2011-2012 8D Technologies inc. 7843a7ee8SRaphael Assenat * Copyright (C) 2009 Texas Instruments Incorporated 8843a7ee8SRaphael Assenat * 9*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 10843a7ee8SRaphael Assenat */ 11843a7ee8SRaphael Assenat #include <common.h> 12843a7ee8SRaphael Assenat #include <netdev.h> 13843a7ee8SRaphael Assenat #include <asm/io.h> 14843a7ee8SRaphael Assenat #include <asm/arch/mem.h> 15843a7ee8SRaphael Assenat #include <asm/arch/mux.h> 16843a7ee8SRaphael Assenat #include <asm/arch/sys_proto.h> 17843a7ee8SRaphael Assenat #include <asm/arch/emac_defs.h> 18843a7ee8SRaphael Assenat #include <asm/gpio.h> 19843a7ee8SRaphael Assenat #include <i2c.h> 20843a7ee8SRaphael Assenat #include <crc.h> 21843a7ee8SRaphael Assenat #include <asm/mach-types.h> 22843a7ee8SRaphael Assenat #include "eco5pk.h" 23843a7ee8SRaphael Assenat 24843a7ee8SRaphael Assenat DECLARE_GLOBAL_DATA_PTR; 25843a7ee8SRaphael Assenat 26843a7ee8SRaphael Assenat /* 27843a7ee8SRaphael Assenat * Routine: board_init 28843a7ee8SRaphael Assenat * Description: Early hardware init. 29843a7ee8SRaphael Assenat */ board_init(void)30843a7ee8SRaphael Assenatint board_init(void) 31843a7ee8SRaphael Assenat { 32843a7ee8SRaphael Assenat gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 33843a7ee8SRaphael Assenat gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 34843a7ee8SRaphael Assenat 35843a7ee8SRaphael Assenat gpio_request(30, "RESOUT"); 36843a7ee8SRaphael Assenat gpio_direction_output(30, 1); 37843a7ee8SRaphael Assenat return 0; 38843a7ee8SRaphael Assenat } 39843a7ee8SRaphael Assenat 40843a7ee8SRaphael Assenat /* 41843a7ee8SRaphael Assenat * Routine: set_muxconf_regs 42843a7ee8SRaphael Assenat * Description: Setting up the configuration Mux registers specific to the 43843a7ee8SRaphael Assenat * hardware. Many pins need to be moved from protect to primary 44843a7ee8SRaphael Assenat * mode. 45843a7ee8SRaphael Assenat */ set_muxconf_regs(void)46843a7ee8SRaphael Assenatvoid set_muxconf_regs(void) 47843a7ee8SRaphael Assenat { 48843a7ee8SRaphael Assenat MUX_ECO5_PK(); 49843a7ee8SRaphael Assenat } 50