xref: /rk3399_rockchip-uboot/arch/xtensa/include/asm/system.h (revision c978b52410016b0ab5a213f235596340af8d45f7) 
1*c978b524SChris Zankel /*
2*c978b524SChris Zankel  * Copyright (C) 2016 Cadence Design Systems Inc.
3*c978b524SChris Zankel  *
4*c978b524SChris Zankel  * SPDX-License-Identifier:	GPL-2.0+
5*c978b524SChris Zankel  */
6*c978b524SChris Zankel 
7*c978b524SChris Zankel #ifndef _XTENSA_SYSTEM_H
8*c978b524SChris Zankel #define _XTENSA_SYSTEM_H
9*c978b524SChris Zankel 
10*c978b524SChris Zankel #include <asm/arch/core.h>
11*c978b524SChris Zankel 
12*c978b524SChris Zankel #if XCHAL_HAVE_INTERRUPTS
13*c978b524SChris Zankel #define local_irq_save(flags) \
14*c978b524SChris Zankel 	__asm__ __volatile__ ("rsil %0, %1" \
15*c978b524SChris Zankel 			      : "=a"(flags) \
16*c978b524SChris Zankel 			      : "I"(XCHAL_EXCM_LEVEL) \
17*c978b524SChris Zankel 			      : "memory")
18*c978b524SChris Zankel #define local_irq_restore(flags) \
19*c978b524SChris Zankel 	__asm__ __volatile__ ("wsr %0, ps\n\t" \
20*c978b524SChris Zankel 			      "rsync" \
21*c978b524SChris Zankel 			      :: "a"(flags) : "memory")
22*c978b524SChris Zankel #else
23*c978b524SChris Zankel #define local_irq_save(flags) ((void)(flags))
24*c978b524SChris Zankel #define local_irq_restore(flags) ((void)(flags))
25*c978b524SChris Zankel #endif
26*c978b524SChris Zankel 
27*c978b524SChris Zankel #endif
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