1 /* 2 * From coreboot src/southbridge/intel/bd82x6x/mrccache.c 3 * 4 * Copyright (C) 2014 Google Inc. 5 * 6 * SPDX-License-Identifier: GPL-2.0 7 */ 8 9 #include <common.h> 10 #include <errno.h> 11 #include <fdtdec.h> 12 #include <net.h> 13 #include <spi.h> 14 #include <spi_flash.h> 15 #include <asm/mrccache.h> 16 17 static struct mrc_data_container *next_mrc_block( 18 struct mrc_data_container *cache) 19 { 20 /* MRC data blocks are aligned within the region */ 21 u32 mrc_size = sizeof(*cache) + cache->data_size; 22 u8 *region_ptr = (u8 *)cache; 23 24 if (mrc_size & (MRC_DATA_ALIGN - 1UL)) { 25 mrc_size &= ~(MRC_DATA_ALIGN - 1UL); 26 mrc_size += MRC_DATA_ALIGN; 27 } 28 29 region_ptr += mrc_size; 30 31 return (struct mrc_data_container *)region_ptr; 32 } 33 34 static int is_mrc_cache(struct mrc_data_container *cache) 35 { 36 return cache && (cache->signature == MRC_DATA_SIGNATURE); 37 } 38 39 struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry) 40 { 41 struct mrc_data_container *cache, *next; 42 ulong base_addr, end_addr; 43 uint id; 44 45 base_addr = (1ULL << 32) - CONFIG_ROM_SIZE + entry->offset; 46 end_addr = base_addr + entry->length; 47 cache = NULL; 48 49 /* Search for the last filled entry in the region */ 50 for (id = 0, next = (struct mrc_data_container *)base_addr; 51 is_mrc_cache(next); 52 id++) { 53 cache = next; 54 next = next_mrc_block(next); 55 if ((ulong)next >= end_addr) 56 break; 57 } 58 59 if (id-- == 0) { 60 debug("%s: No valid MRC cache found.\n", __func__); 61 return NULL; 62 } 63 64 /* Verify checksum */ 65 if (cache->checksum != compute_ip_checksum(cache->data, 66 cache->data_size)) { 67 printf("%s: MRC cache checksum mismatch\n", __func__); 68 return NULL; 69 } 70 71 debug("%s: picked entry %u from cache block\n", __func__, id); 72 73 return cache; 74 } 75 76 /** 77 * find_next_mrc_cache() - get next cache entry 78 * 79 * @entry: MRC cache flash area 80 * @cache: Entry to start from 81 * 82 * @return next cache entry if found, NULL if we got to the end 83 */ 84 static struct mrc_data_container *find_next_mrc_cache(struct fmap_entry *entry, 85 struct mrc_data_container *cache) 86 { 87 ulong base_addr, end_addr; 88 89 base_addr = (1ULL << 32) - CONFIG_ROM_SIZE + entry->offset; 90 end_addr = base_addr + entry->length; 91 92 cache = next_mrc_block(cache); 93 if ((ulong)cache >= end_addr) { 94 /* Crossed the boundary */ 95 cache = NULL; 96 debug("%s: no available entries found\n", __func__); 97 } else { 98 debug("%s: picked next entry from cache block at %p\n", 99 __func__, cache); 100 } 101 102 return cache; 103 } 104 105 int mrccache_update(struct udevice *sf, struct fmap_entry *entry, 106 struct mrc_data_container *cur) 107 { 108 struct mrc_data_container *cache; 109 ulong offset; 110 ulong base_addr; 111 int ret; 112 113 if (!is_mrc_cache(cur)) 114 return -EINVAL; 115 116 /* Find the last used block */ 117 base_addr = (1ULL << 32) - CONFIG_ROM_SIZE + entry->offset; 118 debug("Updating MRC cache data\n"); 119 cache = mrccache_find_current(entry); 120 if (cache && (cache->data_size == cur->data_size) && 121 (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) { 122 debug("MRC data in flash is up to date. No update\n"); 123 return -EEXIST; 124 } 125 126 /* Move to the next block, which will be the first unused block */ 127 if (cache) 128 cache = find_next_mrc_cache(entry, cache); 129 130 /* 131 * If we have got to the end, erase the entire mrc-cache area and start 132 * again at block 0. 133 */ 134 if (!cache) { 135 debug("Erasing the MRC cache region of %x bytes at %x\n", 136 entry->length, entry->offset); 137 138 ret = spi_flash_erase_dm(sf, entry->offset, entry->length); 139 if (ret) { 140 debug("Failed to erase flash region\n"); 141 return ret; 142 } 143 cache = (struct mrc_data_container *)base_addr; 144 } 145 146 /* Write the data out */ 147 offset = (ulong)cache - base_addr + entry->offset; 148 debug("Write MRC cache update to flash at %lx\n", offset); 149 ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur), 150 cur); 151 if (ret) { 152 debug("Failed to write to SPI flash\n"); 153 return ret; 154 } 155 156 return 0; 157 } 158