xref: /rk3399_rockchip-uboot/arch/x86/lib/mrccache.c (revision 2fe66dbcbc1793dc199d90c4d66acaad981f9820)
1 /*
2  * From Coreboot src/southbridge/intel/bd82x6x/mrccache.c
3  *
4  * Copyright (C) 2014 Google Inc.
5  *
6  * SPDX-License-Identifier:	GPL-2.0
7  */
8 
9 #include <common.h>
10 #include <errno.h>
11 #include <fdtdec.h>
12 #include <net.h>
13 #include <spi.h>
14 #include <spi_flash.h>
15 #include <asm/mrccache.h>
16 
17 static struct mrc_data_container *next_mrc_block(
18 	struct mrc_data_container *mrc_cache)
19 {
20 	/* MRC data blocks are aligned within the region */
21 	u32 mrc_size = sizeof(*mrc_cache) + mrc_cache->data_size;
22 	if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {
23 		mrc_size &= ~(MRC_DATA_ALIGN - 1UL);
24 		mrc_size += MRC_DATA_ALIGN;
25 	}
26 
27 	u8 *region_ptr = (u8 *)mrc_cache;
28 	region_ptr += mrc_size;
29 	return (struct mrc_data_container *)region_ptr;
30 }
31 
32 static int is_mrc_cache(struct mrc_data_container *cache)
33 {
34 	return cache && (cache->signature == MRC_DATA_SIGNATURE);
35 }
36 
37 /*
38  * Find the largest index block in the MRC cache. Return NULL if none is
39  * found.
40  */
41 struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry)
42 {
43 	struct mrc_data_container *cache, *next;
44 	ulong base_addr, end_addr;
45 	uint id;
46 
47 	base_addr = (1ULL << 32) - CONFIG_ROM_SIZE + entry->offset;
48 	end_addr = base_addr + entry->length;
49 	cache = NULL;
50 
51 	/* Search for the last filled entry in the region */
52 	for (id = 0, next = (struct mrc_data_container *)base_addr;
53 	     is_mrc_cache(next);
54 	     id++) {
55 		cache = next;
56 		next = next_mrc_block(next);
57 		if ((ulong)next >= end_addr)
58 			break;
59 	}
60 
61 	if (id-- == 0) {
62 		debug("%s: No valid MRC cache found.\n", __func__);
63 		return NULL;
64 	}
65 
66 	/* Verify checksum */
67 	if (cache->checksum != compute_ip_checksum(cache->data,
68 						   cache->data_size)) {
69 		printf("%s: MRC cache checksum mismatch\n", __func__);
70 		return NULL;
71 	}
72 
73 	debug("%s: picked entry %u from cache block\n", __func__, id);
74 
75 	return cache;
76 }
77 
78 /**
79  * find_next_mrc_cache() - get next cache entry
80  *
81  * @entry:	MRC cache flash area
82  * @cache:	Entry to start from
83  *
84  * @return next cache entry if found, NULL if we got to the end
85  */
86 static struct mrc_data_container *find_next_mrc_cache(struct fmap_entry *entry,
87 		struct mrc_data_container *cache)
88 {
89 	ulong base_addr, end_addr;
90 
91 	base_addr = (1ULL << 32) - CONFIG_ROM_SIZE + entry->offset;
92 	end_addr = base_addr + entry->length;
93 
94 	cache = next_mrc_block(cache);
95 	if ((ulong)cache >= end_addr) {
96 		/* Crossed the boundary */
97 		cache = NULL;
98 		debug("%s: no available entries found\n", __func__);
99 	} else {
100 		debug("%s: picked next entry from cache block at %p\n",
101 		      __func__, cache);
102 	}
103 
104 	return cache;
105 }
106 
107 int mrccache_update(struct udevice *sf, struct fmap_entry *entry,
108 		    struct mrc_data_container *cur)
109 {
110 	struct mrc_data_container *cache;
111 	ulong offset;
112 	ulong base_addr;
113 	int ret;
114 
115 	if (!is_mrc_cache(cur))
116 		return -EINVAL;
117 
118 	/* Find the last used block */
119 	base_addr = (1ULL << 32) - CONFIG_ROM_SIZE + entry->offset;
120 	debug("Updating MRC cache data\n");
121 	cache = mrccache_find_current(entry);
122 	if (cache && (cache->data_size == cur->data_size) &&
123 	    (!memcmp(cache, cur, cache->data_size + sizeof(*cur)))) {
124 		debug("MRC data in flash is up to date. No update\n");
125 		return -EEXIST;
126 	}
127 
128 	/* Move to the next block, which will be the first unused block */
129 	if (cache)
130 		cache = find_next_mrc_cache(entry, cache);
131 
132 	/*
133 	 * If we have got to the end, erase the entire mrc-cache area and start
134 	 * again at block 0.
135 	 */
136 	if (!cache) {
137 		debug("Erasing the MRC cache region of %x bytes at %x\n",
138 		      entry->length, entry->offset);
139 
140 		ret = spi_flash_erase_dm(sf, entry->offset, entry->length);
141 		if (ret) {
142 			debug("Failed to erase flash region\n");
143 			return ret;
144 		}
145 		cache = (struct mrc_data_container *)base_addr;
146 	}
147 
148 	/* Write the data out */
149 	offset = (ulong)cache - base_addr + entry->offset;
150 	debug("Write MRC cache update to flash at %lx\n", offset);
151 	ret = spi_flash_write_dm(sf, offset, cur->data_size + sizeof(*cur),
152 				 cur);
153 	if (ret) {
154 		debug("Failed to write to SPI flash\n");
155 		return ret;
156 	}
157 
158 	return 0;
159 }
160