xref: /rk3399_rockchip-uboot/arch/x86/lib/fsp/fsp_common.c (revision 76d1d02fd280ef7ad63a97c3a80bd765bf5596fa)
191785f70SSimon Glass /*
291785f70SSimon Glass  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
391785f70SSimon Glass  *
491785f70SSimon Glass  * SPDX-License-Identifier:	GPL-2.0+
591785f70SSimon Glass  */
691785f70SSimon Glass 
791785f70SSimon Glass #include <common.h>
891785f70SSimon Glass #include <errno.h>
991785f70SSimon Glass #include <asm/io.h>
10ff1e18afSBin Meng #include <asm/mrccache.h>
1191785f70SSimon Glass #include <asm/post.h>
1291785f70SSimon Glass #include <asm/processor.h>
1391785f70SSimon Glass #include <asm/fsp/fsp_support.h>
1491785f70SSimon Glass 
158b097916SSimon Glass DECLARE_GLOBAL_DATA_PTR;
168b097916SSimon Glass 
17*76d1d02fSSimon Glass int checkcpu(void)
18*76d1d02fSSimon Glass {
19*76d1d02fSSimon Glass 	return 0;
20*76d1d02fSSimon Glass }
21*76d1d02fSSimon Glass 
2291785f70SSimon Glass int print_cpuinfo(void)
2391785f70SSimon Glass {
2491785f70SSimon Glass 	post_code(POST_CPU_INFO);
2591785f70SSimon Glass 	return default_print_cpuinfo();
2691785f70SSimon Glass }
2791785f70SSimon Glass 
28412400abSSimon Glass int fsp_init_phase_pci(void)
2991785f70SSimon Glass {
3091785f70SSimon Glass 	u32 status;
3191785f70SSimon Glass 
3291785f70SSimon Glass 	/* call into FspNotify */
3391785f70SSimon Glass 	debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
3491785f70SSimon Glass 	status = fsp_notify(NULL, INIT_PHASE_PCI);
35412400abSSimon Glass 	if (status)
3691785f70SSimon Glass 		debug("fail, error code %x\n", status);
3791785f70SSimon Glass 	else
3891785f70SSimon Glass 		debug("OK\n");
3991785f70SSimon Glass 
40412400abSSimon Glass 	return status ? -EPERM : 0;
41412400abSSimon Glass }
42412400abSSimon Glass 
4391785f70SSimon Glass void board_final_cleanup(void)
4491785f70SSimon Glass {
4591785f70SSimon Glass 	u32 status;
4691785f70SSimon Glass 
4791785f70SSimon Glass 	/* call into FspNotify */
4891785f70SSimon Glass 	debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
4991785f70SSimon Glass 	status = fsp_notify(NULL, INIT_PHASE_BOOT);
50ecf674b7SSimon Glass 	if (status)
5191785f70SSimon Glass 		debug("fail, error code %x\n", status);
5291785f70SSimon Glass 	else
5391785f70SSimon Glass 		debug("OK\n");
5491785f70SSimon Glass 
5591785f70SSimon Glass 	return;
5691785f70SSimon Glass }
57aefaff8eSBin Meng 
58ff1e18afSBin Meng static __maybe_unused void *fsp_prepare_mrc_cache(void)
59ff1e18afSBin Meng {
60ff1e18afSBin Meng 	struct mrc_data_container *cache;
61ff1e18afSBin Meng 	struct mrc_region entry;
62ff1e18afSBin Meng 	int ret;
63ff1e18afSBin Meng 
64ff1e18afSBin Meng 	ret = mrccache_get_region(NULL, &entry);
65ff1e18afSBin Meng 	if (ret)
66ff1e18afSBin Meng 		return NULL;
67ff1e18afSBin Meng 
68ff1e18afSBin Meng 	cache = mrccache_find_current(&entry);
69ff1e18afSBin Meng 	if (!cache)
70ff1e18afSBin Meng 		return NULL;
71ff1e18afSBin Meng 
72ff1e18afSBin Meng 	debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
73ff1e18afSBin Meng 	      cache->data, cache->data_size, cache->checksum);
74ff1e18afSBin Meng 
75ff1e18afSBin Meng 	return cache->data;
76ff1e18afSBin Meng }
77ff1e18afSBin Meng 
78671549e5SSimon Glass int arch_fsp_init(void)
79aefaff8eSBin Meng {
80ff1e18afSBin Meng 	void *nvs;
81ff1e18afSBin Meng 
8257b10f59SBin Meng 	if (!gd->arch.hob_list) {
83ff1e18afSBin Meng #ifdef CONFIG_ENABLE_MRC_CACHE
84ff1e18afSBin Meng 		nvs = fsp_prepare_mrc_cache();
85ff1e18afSBin Meng #else
86ff1e18afSBin Meng 		nvs = NULL;
87ff1e18afSBin Meng #endif
8857b10f59SBin Meng 		/*
8957b10f59SBin Meng 		 * The first time we enter here, call fsp_init().
9057b10f59SBin Meng 		 * Note the execution does not return to this function,
9157b10f59SBin Meng 		 * instead it jumps to fsp_continue().
9257b10f59SBin Meng 		 */
93ff1e18afSBin Meng 		fsp_init(CONFIG_FSP_TEMP_RAM_ADDR, BOOT_FULL_CONFIG, nvs);
9457b10f59SBin Meng 	} else {
9557b10f59SBin Meng 		/*
9657b10f59SBin Meng 		 * The second time we enter here, adjust the size of malloc()
9757b10f59SBin Meng 		 * pool before relocation. Given gd->malloc_base was adjusted
98ecc30663SAlbert ARIBAUD 		 * after the call to board_init_f_init_reserve() in arch/x86/
99ecc30663SAlbert ARIBAUD 		 * cpu/start.S, we should fix up gd->malloc_limit here.
10057b10f59SBin Meng 		 */
10157b10f59SBin Meng 		gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN;
10257b10f59SBin Meng 	}
103aefaff8eSBin Meng 
104aefaff8eSBin Meng 	return 0;
105aefaff8eSBin Meng }
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