xref: /rk3399_rockchip-uboot/arch/x86/include/asm/u-boot-x86.h (revision afbf1404c13deca6bbbc4d037e27ddde6150acd8)
1fea25720SGraeme Russ /*
2fea25720SGraeme Russ  * (C) Copyright 2002
3fa82f871SAlbert ARIBAUD  * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
4fea25720SGraeme Russ  *
51a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
6fea25720SGraeme Russ  */
7fea25720SGraeme Russ 
8fea25720SGraeme Russ #ifndef _U_BOOT_I386_H_
9fea25720SGraeme Russ #define _U_BOOT_I386_H_	1
10fea25720SGraeme Russ 
11fea25720SGraeme Russ /* cpu/.../cpu.c */
128b37c769SSimon Glass int arch_cpu_init(void);
13fea25720SGraeme Russ int x86_cpu_init_f(void);
14fea25720SGraeme Russ int cpu_init_f(void);
159e6c572fSGraeme Russ void init_gd(gd_t *id, u64 *gdt_addr);
169e6c572fSGraeme Russ void setup_gdt(gd_t *id, u64 *gdt_addr);
17d653244bSGraeme Russ int init_cache(void);
18f30fc4deSGabe Black int cleanup_before_linux(void);
19c78a62acSSimon Glass void panic_puts(const char *str);
20fea25720SGraeme Russ 
21fea25720SGraeme Russ /* cpu/.../timer.c */
22fea25720SGraeme Russ void timer_isr(void *);
23fea25720SGraeme Russ typedef void (timer_fnc_t) (void);
24fea25720SGraeme Russ int register_timer_isr (timer_fnc_t *isr_func);
25e761ecdbSSimon Glass unsigned long get_tbclk_mhz(void);
26e761ecdbSSimon Glass void timer_set_base(uint64_t base);
27d0b6f247SSimon Glass int pcat_timer_init(void);
28fea25720SGraeme Russ 
29fea25720SGraeme Russ /* cpu/.../interrupts.c */
30fea25720SGraeme Russ int cpu_init_interrupts(void);
31fea25720SGraeme Russ 
32e1ffd817SSimon Glass int cleanup_before_linux(void);
33e1ffd817SSimon Glass int x86_cleanup_before_linux(void);
34e1ffd817SSimon Glass void x86_enable_caches(void);
35e1ffd817SSimon Glass void x86_disable_caches(void);
36e1ffd817SSimon Glass int x86_init_cache(void);
37e1ffd817SSimon Glass void reset_cpu(ulong addr);
38e1ffd817SSimon Glass ulong board_get_usable_ram_top(ulong total_size);
39e1ffd817SSimon Glass void dram_init_banksize(void);
40727c1a98SSimon Glass int default_print_cpuinfo(void);
41e1ffd817SSimon Glass 
42447f8b01SSimon Glass /* Set up a UART which can be used with printch(), printhex8(), etc. */
43447f8b01SSimon Glass int setup_early_uart(void);
44447f8b01SSimon Glass 
45fea25720SGraeme Russ void setup_pcat_compatibility(void);
46fea25720SGraeme Russ 
47fea25720SGraeme Russ void isa_unmap_rom(u32 addr);
48fea25720SGraeme Russ u32 isa_map_rom(u32 bus_addr, int size);
49fea25720SGraeme Russ 
50fea25720SGraeme Russ /* arch/x86/lib/... */
51fea25720SGraeme Russ int video_bios_init(void);
52fea25720SGraeme Russ 
53f48dd6fcSGraeme Russ void	board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
54f48dd6fcSGraeme Russ void	board_init_f_r(void) __attribute__ ((noreturn));
55fea25720SGraeme Russ 
56*afbf1404SBin Meng int arch_misc_init(void);
57*afbf1404SBin Meng 
582f899e03SVadim Bendebury /* Read the time stamp counter */
59d8819f94SSimon Glass static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void)
602f899e03SVadim Bendebury {
612f899e03SVadim Bendebury 	uint32_t high, low;
622f899e03SVadim Bendebury 	__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
632f899e03SVadim Bendebury 	return (((uint64_t)high) << 32) | low;
642f899e03SVadim Bendebury }
652f899e03SVadim Bendebury 
662f899e03SVadim Bendebury /* board/... */
672f899e03SVadim Bendebury void timer_set_tsc_base(uint64_t new_base);
682f899e03SVadim Bendebury uint64_t timer_get_tsc(void);
692f899e03SVadim Bendebury 
7065dd74a6SSimon Glass void quick_ram_check(void);
7165dd74a6SSimon Glass 
72bdc88d4eSSimon Glass #define PCI_VGA_RAM_IMAGE_START		0xc0000
73bdc88d4eSSimon Glass 
74fea25720SGraeme Russ #endif	/* _U_BOOT_I386_H_ */
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