xref: /rk3399_rockchip-uboot/arch/x86/include/asm/u-boot-x86.h (revision 3ff240c92f516841d8aff3b7d9268763711f2afd)
1fea25720SGraeme Russ /*
2fea25720SGraeme Russ  * (C) Copyright 2002
3fa82f871SAlbert ARIBAUD  * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
4fea25720SGraeme Russ  *
51a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
6fea25720SGraeme Russ  */
7fea25720SGraeme Russ 
8fea25720SGraeme Russ #ifndef _U_BOOT_I386_H_
9fea25720SGraeme Russ #define _U_BOOT_I386_H_	1
10fea25720SGraeme Russ 
11*3ff240c9SSimon Glass struct global_data;
12*3ff240c9SSimon Glass 
13002610f6SBin Meng extern char gdt_rom[];
14002610f6SBin Meng 
15fea25720SGraeme Russ /* cpu/.../cpu.c */
168b37c769SSimon Glass int arch_cpu_init(void);
17fea25720SGraeme Russ int x86_cpu_init_f(void);
18fea25720SGraeme Russ int cpu_init_f(void);
19*3ff240c9SSimon Glass void setup_gdt(struct global_data *id, u64 *gdt_addr);
20002610f6SBin Meng /*
21002610f6SBin Meng  * Setup FSP execution environment GDT to use the one we used in
22002610f6SBin Meng  * arch/x86/cpu/start16.S and reload the segment registers.
23002610f6SBin Meng  */
24002610f6SBin Meng void setup_fsp_gdt(void);
25d653244bSGraeme Russ int init_cache(void);
26f30fc4deSGabe Black int cleanup_before_linux(void);
27fea25720SGraeme Russ 
28fea25720SGraeme Russ /* cpu/.../timer.c */
29fea25720SGraeme Russ void timer_isr(void *);
30fea25720SGraeme Russ typedef void (timer_fnc_t) (void);
31fea25720SGraeme Russ int register_timer_isr (timer_fnc_t *isr_func);
32e761ecdbSSimon Glass unsigned long get_tbclk_mhz(void);
33e761ecdbSSimon Glass void timer_set_base(uint64_t base);
34da3fe247SBin Meng int i8254_init(void);
35fea25720SGraeme Russ 
36fea25720SGraeme Russ /* cpu/.../interrupts.c */
37fea25720SGraeme Russ int cpu_init_interrupts(void);
38fea25720SGraeme Russ 
39e1ffd817SSimon Glass int cleanup_before_linux(void);
40e1ffd817SSimon Glass int x86_cleanup_before_linux(void);
41e1ffd817SSimon Glass void x86_enable_caches(void);
42e1ffd817SSimon Glass void x86_disable_caches(void);
43e1ffd817SSimon Glass int x86_init_cache(void);
44e1ffd817SSimon Glass void reset_cpu(ulong addr);
45e1ffd817SSimon Glass ulong board_get_usable_ram_top(ulong total_size);
46727c1a98SSimon Glass int default_print_cpuinfo(void);
47e1ffd817SSimon Glass 
48447f8b01SSimon Glass /* Set up a UART which can be used with printch(), printhex8(), etc. */
49d521197dSStefan Roese int setup_internal_uart(int enable);
50447f8b01SSimon Glass 
51fea25720SGraeme Russ void setup_pcat_compatibility(void);
52fea25720SGraeme Russ 
53fea25720SGraeme Russ void isa_unmap_rom(u32 addr);
54fea25720SGraeme Russ u32 isa_map_rom(u32 bus_addr, int size);
55fea25720SGraeme Russ 
56fea25720SGraeme Russ /* arch/x86/lib/... */
57fea25720SGraeme Russ int video_bios_init(void);
58fea25720SGraeme Russ 
59ba65808eSBin Meng /* arch/x86/lib/fsp/... */
60ba65808eSBin Meng 
61ba65808eSBin Meng /**
62ba65808eSBin Meng  * fsp_save_s3_stack() - save stack address to CMOS for next S3 boot
63ba65808eSBin Meng  *
64ba65808eSBin Meng  * At the end of pre-relocation phase, save the new stack address
65ba65808eSBin Meng  * to CMOS and use it as the stack on next S3 boot for fsp_init()
66ba65808eSBin Meng  * continuation function.
67ba65808eSBin Meng  *
68ba65808eSBin Meng  * @return:	0 if OK, -ve on error
69ba65808eSBin Meng  */
70ba65808eSBin Meng int fsp_save_s3_stack(void);
71ba65808eSBin Meng 
72f48dd6fcSGraeme Russ void	board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
73f48dd6fcSGraeme Russ void	board_init_f_r(void) __attribute__ ((noreturn));
74fea25720SGraeme Russ 
75afbf1404SBin Meng int arch_misc_init(void);
76afbf1404SBin Meng 
772f899e03SVadim Bendebury /* Read the time stamp counter */
rdtsc(void)78d8819f94SSimon Glass static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void)
792f899e03SVadim Bendebury {
802f899e03SVadim Bendebury 	uint32_t high, low;
812f899e03SVadim Bendebury 	__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
822f899e03SVadim Bendebury 	return (((uint64_t)high) << 32) | low;
832f899e03SVadim Bendebury }
842f899e03SVadim Bendebury 
852f899e03SVadim Bendebury /* board/... */
862f899e03SVadim Bendebury void timer_set_tsc_base(uint64_t new_base);
872f899e03SVadim Bendebury uint64_t timer_get_tsc(void);
88b7b8410aSAlexander Graf void board_quiesce_devices(void);
892f899e03SVadim Bendebury 
9065dd74a6SSimon Glass void quick_ram_check(void);
9165dd74a6SSimon Glass 
92bdc88d4eSSimon Glass #define PCI_VGA_RAM_IMAGE_START		0xc0000
93bdc88d4eSSimon Glass 
94fea25720SGraeme Russ #endif	/* _U_BOOT_I386_H_ */
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