1*a2927e09SBin Meng /* 2*a2927e09SBin Meng * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 3*a2927e09SBin Meng * 4*a2927e09SBin Meng * Adapted from coreboot src/include/device/pnp_def.h 5*a2927e09SBin Meng * and arch/x86/include/arch/io.h 6*a2927e09SBin Meng * 7*a2927e09SBin Meng * SPDX-License-Identifier: GPL-2.0+ 8*a2927e09SBin Meng */ 9*a2927e09SBin Meng 10*a2927e09SBin Meng #ifndef _ASM_PNP_DEF_H_ 11*a2927e09SBin Meng #define _ASM_PNP_DEF_H_ 12*a2927e09SBin Meng 13*a2927e09SBin Meng #include <asm/io.h> 14*a2927e09SBin Meng 15*a2927e09SBin Meng #define PNP_IDX_EN 0x30 16*a2927e09SBin Meng #define PNP_IDX_IO0 0x60 17*a2927e09SBin Meng #define PNP_IDX_IO1 0x62 18*a2927e09SBin Meng #define PNP_IDX_IO2 0x64 19*a2927e09SBin Meng #define PNP_IDX_IO3 0x66 20*a2927e09SBin Meng #define PNP_IDX_IRQ0 0x70 21*a2927e09SBin Meng #define PNP_IDX_IRQ1 0x72 22*a2927e09SBin Meng #define PNP_IDX_DRQ0 0x74 23*a2927e09SBin Meng #define PNP_IDX_DRQ1 0x75 24*a2927e09SBin Meng #define PNP_IDX_MSC0 0xf0 25*a2927e09SBin Meng #define PNP_IDX_MSC1 0xf1 26*a2927e09SBin Meng 27*a2927e09SBin Meng /* Generic functions for pnp devices */ 28*a2927e09SBin Meng 29*a2927e09SBin Meng /* 30*a2927e09SBin Meng * pnp device is a 16-bit integer composed of its i/o port address at high byte 31*a2927e09SBin Meng * and logic function number at low byte. 32*a2927e09SBin Meng */ 33*a2927e09SBin Meng #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC)) 34*a2927e09SBin Meng 35*a2927e09SBin Meng static inline void pnp_write_config(uint16_t dev, uint8_t reg, uint8_t value) 36*a2927e09SBin Meng { 37*a2927e09SBin Meng uint8_t port = dev >> 8; 38*a2927e09SBin Meng 39*a2927e09SBin Meng outb(reg, port); 40*a2927e09SBin Meng outb(value, port + 1); 41*a2927e09SBin Meng } 42*a2927e09SBin Meng 43*a2927e09SBin Meng static inline uint8_t pnp_read_config(uint16_t dev, uint8_t reg) 44*a2927e09SBin Meng { 45*a2927e09SBin Meng uint8_t port = dev >> 8; 46*a2927e09SBin Meng 47*a2927e09SBin Meng outb(reg, port); 48*a2927e09SBin Meng return inb(port + 1); 49*a2927e09SBin Meng } 50*a2927e09SBin Meng 51*a2927e09SBin Meng static inline void pnp_set_logical_device(uint16_t dev) 52*a2927e09SBin Meng { 53*a2927e09SBin Meng uint8_t device = dev & 0xff; 54*a2927e09SBin Meng 55*a2927e09SBin Meng pnp_write_config(dev, 0x07, device); 56*a2927e09SBin Meng } 57*a2927e09SBin Meng 58*a2927e09SBin Meng static inline void pnp_set_enable(uint16_t dev, int enable) 59*a2927e09SBin Meng { 60*a2927e09SBin Meng pnp_write_config(dev, PNP_IDX_EN, enable ? 1 : 0); 61*a2927e09SBin Meng } 62*a2927e09SBin Meng 63*a2927e09SBin Meng static inline int pnp_read_enable(uint16_t dev) 64*a2927e09SBin Meng { 65*a2927e09SBin Meng return !!pnp_read_config(dev, PNP_IDX_EN); 66*a2927e09SBin Meng } 67*a2927e09SBin Meng 68*a2927e09SBin Meng static inline void pnp_set_iobase(uint16_t dev, uint8_t index, uint16_t iobase) 69*a2927e09SBin Meng { 70*a2927e09SBin Meng pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff); 71*a2927e09SBin Meng pnp_write_config(dev, index + 1, iobase & 0xff); 72*a2927e09SBin Meng } 73*a2927e09SBin Meng 74*a2927e09SBin Meng static inline uint16_t pnp_read_iobase(uint16_t dev, uint8_t index) 75*a2927e09SBin Meng { 76*a2927e09SBin Meng return ((uint16_t)(pnp_read_config(dev, index)) << 8) | 77*a2927e09SBin Meng pnp_read_config(dev, index + 1); 78*a2927e09SBin Meng } 79*a2927e09SBin Meng 80*a2927e09SBin Meng static inline void pnp_set_irq(uint16_t dev, uint8_t index, unsigned irq) 81*a2927e09SBin Meng { 82*a2927e09SBin Meng pnp_write_config(dev, index, irq); 83*a2927e09SBin Meng } 84*a2927e09SBin Meng 85*a2927e09SBin Meng static inline void pnp_set_drq(uint16_t dev, uint8_t index, unsigned drq) 86*a2927e09SBin Meng { 87*a2927e09SBin Meng pnp_write_config(dev, index, drq & 0xff); 88*a2927e09SBin Meng } 89*a2927e09SBin Meng 90*a2927e09SBin Meng #endif /* _ASM_PNP_DEF_H_ */ 91