xref: /rk3399_rockchip-uboot/arch/x86/include/asm/global_data.h (revision 9558b48af006a34d3ab7f0bd13a76b97acd45e47)
1fea25720SGraeme Russ /*
2fea25720SGraeme Russ  * (C) Copyright 2002-2010
3fea25720SGraeme Russ  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4fea25720SGraeme Russ  *
5fea25720SGraeme Russ  * See file CREDITS for list of people who contributed to this
6fea25720SGraeme Russ  * project.
7fea25720SGraeme Russ  *
8fea25720SGraeme Russ  * This program is free software; you can redistribute it and/or
9fea25720SGraeme Russ  * modify it under the terms of the GNU General Public License as
10fea25720SGraeme Russ  * published by the Free Software Foundation; either version 2 of
11fea25720SGraeme Russ  * the License, or (at your option) any later version.
12fea25720SGraeme Russ  *
13fea25720SGraeme Russ  * This program is distributed in the hope that it will be useful,
14fea25720SGraeme Russ  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15fea25720SGraeme Russ  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16fea25720SGraeme Russ  * GNU General Public License for more details.
17fea25720SGraeme Russ  *
18fea25720SGraeme Russ  * You should have received a copy of the GNU General Public License
19fea25720SGraeme Russ  * along with this program; if not, write to the Free Software
20fea25720SGraeme Russ  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21fea25720SGraeme Russ  * MA 02111-1307 USA
22fea25720SGraeme Russ  */
23fea25720SGraeme Russ 
24fea25720SGraeme Russ #ifndef	__ASM_GBL_DATA_H
25fea25720SGraeme Russ #define __ASM_GBL_DATA_H
26fea25720SGraeme Russ /*
27fea25720SGraeme Russ  * The following data structure is placed in some memory wich is
28fea25720SGraeme Russ  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
29fea25720SGraeme Russ  * some locked parts of the data cache) to allow for a minimum set of
30fea25720SGraeme Russ  * global variables during system initialization (until we have set
31fea25720SGraeme Russ  * up the memory controller so that we can use RAM).
32fea25720SGraeme Russ  *
33fea25720SGraeme Russ  * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
34fea25720SGraeme Russ  */
35fea25720SGraeme Russ 
36fea25720SGraeme Russ #ifndef __ASSEMBLY__
37fea25720SGraeme Russ 
38fea25720SGraeme Russ typedef	struct global_data {
39fea25720SGraeme Russ 	bd_t		*bd;
40fea25720SGraeme Russ 	unsigned long	flags;
41fea25720SGraeme Russ 	unsigned long	baudrate;
42fea25720SGraeme Russ 	unsigned long	have_console;	/* serial_init() was called */
43*9558b48aSGraeme Russ #ifdef CONFIG_PRE_CONSOLE_BUFFER
44*9558b48aSGraeme Russ 	unsigned long	precon_buf_idx;	/* Pre-Console buffer index */
45*9558b48aSGraeme Russ #endif
46fea25720SGraeme Russ 	unsigned long	reloc_off;	/* Relocation Offset */
47fea25720SGraeme Russ 	unsigned long	load_off;	/* Load Offset */
48fea25720SGraeme Russ 	unsigned long	env_addr;	/* Address  of Environment struct */
49fea25720SGraeme Russ 	unsigned long	env_valid;	/* Checksum of Environment valid? */
50fea25720SGraeme Russ 	unsigned long	cpu_clk;	/* CPU clock in Hz!		*/
51fea25720SGraeme Russ 	unsigned long	bus_clk;
52fea25720SGraeme Russ 	unsigned long	relocaddr;	/* Start address of U-Boot in RAM */
53fea25720SGraeme Russ 	unsigned long	start_addr_sp;	/* start_addr_stackpointer */
54fea25720SGraeme Russ 	phys_size_t	ram_size;	/* RAM size */
55fea25720SGraeme Russ 	unsigned long	reset_status;	/* reset status register at boot */
56fea25720SGraeme Russ 	void		**jt;		/* jump table */
57fea25720SGraeme Russ 	char		env_buf[32];	/* buffer for getenv() before reloc. */
58fea25720SGraeme Russ } gd_t;
59fea25720SGraeme Russ 
60fea25720SGraeme Russ extern gd_t *gd;
61fea25720SGraeme Russ 
62fea25720SGraeme Russ #endif
63fea25720SGraeme Russ 
64fea25720SGraeme Russ /* Word Offsets into Global Data - MUST match struct gd_t */
65fea25720SGraeme Russ #define GD_BD		0
66fea25720SGraeme Russ #define GD_FLAGS	1
67fea25720SGraeme Russ #define GD_BAUDRATE	2
68fea25720SGraeme Russ #define GD_HAVE_CONSOLE	3
69fea25720SGraeme Russ #define GD_RELOC_OFF	4
70fea25720SGraeme Russ #define GD_LOAD_OFF	5
71fea25720SGraeme Russ #define GD_ENV_ADDR	6
72fea25720SGraeme Russ #define GD_ENV_VALID	7
73fea25720SGraeme Russ #define GD_CPU_CLK	8
74fea25720SGraeme Russ #define GD_BUS_CLK	9
75fea25720SGraeme Russ #define GD_RELOC_ADDR	10
76fea25720SGraeme Russ #define GD_START_ADDR_SP	11
77fea25720SGraeme Russ #define GD_RAM_SIZE	12
78fea25720SGraeme Russ #define GD_RESET_STATUS	13
79fea25720SGraeme Russ #define GD_JT		14
80fea25720SGraeme Russ 
81fea25720SGraeme Russ #define GD_SIZE		15
82fea25720SGraeme Russ 
83fea25720SGraeme Russ /*
84fea25720SGraeme Russ  * Global Data Flags
85fea25720SGraeme Russ  */
86fea25720SGraeme Russ #define	GD_FLG_RELOC		0x00001	/* Code was relocated to RAM		*/
87fea25720SGraeme Russ #define	GD_FLG_DEVINIT		0x00002	/* Devices have been initialized	*/
88fea25720SGraeme Russ #define	GD_FLG_SILENT		0x00004	/* Silent mode				*/
89fea25720SGraeme Russ #define	GD_FLG_POSTFAIL		0x00008	/* Critical POST test failed		*/
90fea25720SGraeme Russ #define	GD_FLG_POSTSTOP		0x00010	/* POST seqeunce aborted		*/
91fea25720SGraeme Russ #define	GD_FLG_LOGINIT		0x00020	/* Log Buffer has been initialized	*/
92fea25720SGraeme Russ #define GD_FLG_DISABLE_CONSOLE	0x00040	/* Disable console (in & out)		*/
93fea25720SGraeme Russ #define GD_FLG_ENV_READY	0x00080	/* Environment imported into hash table	*/
94fea25720SGraeme Russ #define GD_FLG_COLD_BOOT	0x00100	/* Cold Boot */
95fea25720SGraeme Russ #define GD_FLG_WARM_BOOT	0x00200	/* Warm Boot */
96fea25720SGraeme Russ 
97fea25720SGraeme Russ #if 0
98fea25720SGraeme Russ #define DECLARE_GLOBAL_DATA_PTR
99fea25720SGraeme Russ #else
100fea25720SGraeme Russ #define XTRN_DECLARE_GLOBAL_DATA_PTR    extern
101fea25720SGraeme Russ #define DECLARE_GLOBAL_DATA_PTR     XTRN_DECLARE_GLOBAL_DATA_PTR \
102fea25720SGraeme Russ gd_t *gd
103fea25720SGraeme Russ #endif
104fea25720SGraeme Russ 
105fea25720SGraeme Russ #endif /* __ASM_GBL_DATA_H */
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