1fea25720SGraeme Russ /* 2fea25720SGraeme Russ * (C) Copyright 2002-2010 3fea25720SGraeme Russ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4fea25720SGraeme Russ * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6fea25720SGraeme Russ */ 7fea25720SGraeme Russ 8fea25720SGraeme Russ #ifndef __ASM_GBL_DATA_H 9fea25720SGraeme Russ #define __ASM_GBL_DATA_H 105cb48582SSimon Glass 115cb48582SSimon Glass #ifndef __ASSEMBLY__ 125cb48582SSimon Glass 132db93745SSimon Glass #include <asm/processor.h> 142db93745SSimon Glass 158e0df066SSimon Glass enum pei_boot_mode_t { 168e0df066SSimon Glass PEI_BOOT_NONE = 0, 178e0df066SSimon Glass PEI_BOOT_SOFT_RESET, 188e0df066SSimon Glass PEI_BOOT_RESUME, 198e0df066SSimon Glass 208e0df066SSimon Glass }; 218e0df066SSimon Glass 222627c7e2SSimon Glass struct dimm_info { 232627c7e2SSimon Glass uint32_t dimm_size; 242627c7e2SSimon Glass uint16_t ddr_type; 252627c7e2SSimon Glass uint16_t ddr_frequency; 262627c7e2SSimon Glass uint8_t rank_per_dimm; 272627c7e2SSimon Glass uint8_t channel_num; 282627c7e2SSimon Glass uint8_t dimm_num; 292627c7e2SSimon Glass uint8_t bank_locator; 302627c7e2SSimon Glass /* The 5th byte is '\0' for the end of string */ 312627c7e2SSimon Glass uint8_t serial[5]; 322627c7e2SSimon Glass /* The 19th byte is '\0' for the end of string */ 332627c7e2SSimon Glass uint8_t module_part_number[19]; 342627c7e2SSimon Glass uint16_t mod_id; 352627c7e2SSimon Glass uint8_t mod_type; 362627c7e2SSimon Glass uint8_t bus_width; 372627c7e2SSimon Glass } __packed; 382627c7e2SSimon Glass 392627c7e2SSimon Glass struct pei_memory_info { 402627c7e2SSimon Glass uint8_t dimm_cnt; 412627c7e2SSimon Glass /* Maximum num of dimm is 8 */ 422627c7e2SSimon Glass struct dimm_info dimm[8]; 432627c7e2SSimon Glass } __packed; 442627c7e2SSimon Glass 4565dd74a6SSimon Glass struct memory_area { 4665dd74a6SSimon Glass uint64_t start; 4765dd74a6SSimon Glass uint64_t size; 4865dd74a6SSimon Glass }; 4965dd74a6SSimon Glass 5065dd74a6SSimon Glass struct memory_info { 5165dd74a6SSimon Glass int num_areas; 5265dd74a6SSimon Glass uint64_t total_memory; 5365dd74a6SSimon Glass uint64_t total_32bit_memory; 5465dd74a6SSimon Glass struct memory_area area[CONFIG_NR_DRAM_BANKS]; 5565dd74a6SSimon Glass }; 5665dd74a6SSimon Glass 57aff2523fSSimon Glass #define MAX_MTRR_REQUESTS 8 58aff2523fSSimon Glass 59aff2523fSSimon Glass /** 60aff2523fSSimon Glass * A request for a memory region to be set up in a particular way. These 61aff2523fSSimon Glass * requests are processed before board_init_r() is called. They are generally 62aff2523fSSimon Glass * optional and can be ignored with some performance impact. 63aff2523fSSimon Glass */ 64aff2523fSSimon Glass struct mtrr_request { 65aff2523fSSimon Glass int type; /* MTRR_TYPE_... */ 66aff2523fSSimon Glass uint64_t start; 67aff2523fSSimon Glass uint64_t size; 68aff2523fSSimon Glass }; 69aff2523fSSimon Glass 705cb48582SSimon Glass /* Architecture-specific global data */ 715cb48582SSimon Glass struct arch_global_data { 722db93745SSimon Glass u64 gdt[X86_GDT_NUM_ENTRIES] __aligned(16); 735a35e6c4SSimon Glass struct global_data *gd_addr; /* Location of Global Data */ 7452f952bfSBin Meng uint8_t x86; /* CPU family */ 7552f952bfSBin Meng uint8_t x86_vendor; /* CPU vendor */ 7652f952bfSBin Meng uint8_t x86_model; 7752f952bfSBin Meng uint8_t x86_mask; 7852f952bfSBin Meng uint32_t x86_device; 79bc2df1afSSimon Glass uint64_t tsc_base; /* Initial value returned by rdtsc() */ 80f697d528SSimon Glass void *new_fdt; /* Relocated FDT */ 81f67cd51eSSimon Glass uint32_t bist; /* Built-in self test value */ 828e0df066SSimon Glass enum pei_boot_mode_t pei_boot_mode; 831b4f25ffSSimon Glass const struct pch_gpio_map *gpio_map; /* board GPIO map */ 8465dd74a6SSimon Glass struct memory_info meminfo; /* Memory information */ 852627c7e2SSimon Glass struct pei_memory_info pei_meminfo; /* PEI memory information */ 86bceb9f0fSBin Meng #ifdef CONFIG_HAVE_FSP 87bceb9f0fSBin Meng void *hob_list; /* FSP HOB list */ 88bceb9f0fSBin Meng #endif 89aff2523fSSimon Glass struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS]; 90aff2523fSSimon Glass int mtrr_req_count; 9149491669SBin Meng int has_mtrr; 92191c008aSSimon Glass /* MRC training data to save for the next boot */ 93191c008aSSimon Glass char *mrc_output; 94191c008aSSimon Glass unsigned int mrc_output_len; 9542fde305SSimon Glass ulong table; /* Table pointer from previous loader */ 96a0c75f90SSimon Glass int turbo_state; /* Current turbo state */ 971bff8363SSimon Glass struct irq_routing_table *pirq_routing_table; 98789b6dceSBin Meng #ifdef CONFIG_SEABIOS 99789b6dceSBin Meng u32 high_table_ptr; 100789b6dceSBin Meng u32 high_table_limit; 101789b6dceSBin Meng #endif 102b727961bSBin Meng #ifdef CONFIG_HAVE_ACPI_RESUME 103e652e130SBin Meng int prev_sleep_state; /* Previous sleep state ACPI_S0/1../5 */ 104*5ae5aa93SBin Meng ulong backup_mem; /* Backup memory address for S3 */ 105b727961bSBin Meng #endif 1065cb48582SSimon Glass }; 1075cb48582SSimon Glass 1089558b48aSGraeme Russ #endif 109fea25720SGraeme Russ 11043cff66eSSimon Glass #include <asm-generic/global_data.h> 11143cff66eSSimon Glass 11243cff66eSSimon Glass #ifndef __ASSEMBLY__ 113a160092aSSimon Glass # if defined(CONFIG_EFI_APP) || CONFIG_IS_ENABLED(X86_64) 1148f3b9694SSimon Glass 115a160092aSSimon Glass /* TODO(sjg@chromium.org): Consider using a fixed register for gd on x86_64 */ 1168f3b9694SSimon Glass #define gd global_data_ptr 1178f3b9694SSimon Glass 1188f3b9694SSimon Glass #define DECLARE_GLOBAL_DATA_PTR extern struct global_data *global_data_ptr 1198f3b9694SSimon Glass # else get_fs_gd_ptr(void)120d8819f94SSimon Glassstatic inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void) 1219e6c572fSGraeme Russ { 1229e6c572fSGraeme Russ gd_t *gd_ptr; 1239e6c572fSGraeme Russ 124a160092aSSimon Glass #if CONFIG_IS_ENABLED(X86_64) 125a160092aSSimon Glass asm volatile("fs mov 0, %0\n" : "=r" (gd_ptr)); 126a160092aSSimon Glass #else 1279e6c572fSGraeme Russ asm volatile("fs movl 0, %0\n" : "=r" (gd_ptr)); 128a160092aSSimon Glass #endif 1299e6c572fSGraeme Russ 1309e6c572fSGraeme Russ return gd_ptr; 1319e6c572fSGraeme Russ } 1329e6c572fSGraeme Russ 1339e6c572fSGraeme Russ #define gd get_fs_gd_ptr() 134fea25720SGraeme Russ 13583ec7de3SSimon Glass #define DECLARE_GLOBAL_DATA_PTR 1368f3b9694SSimon Glass # endif 13783ec7de3SSimon Glass 138fea25720SGraeme Russ #endif 139fea25720SGraeme Russ 14091d82a29SGabe Black /* 14191d82a29SGabe Black * Our private Global Data Flags 14291d82a29SGabe Black */ 14383ec7de3SSimon Glass #define GD_FLG_COLD_BOOT 0x10000 /* Cold Boot */ 14483ec7de3SSimon Glass #define GD_FLG_WARM_BOOT 0x20000 /* Warm Boot */ 145fea25720SGraeme Russ 146fea25720SGraeme Russ #endif /* __ASM_GBL_DATA_H */ 147