1*48cf8b83SBin Meng /* 2*48cf8b83SBin Meng * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com> 3*48cf8b83SBin Meng * 4*48cf8b83SBin Meng * SPDX-License-Identifier: GPL-2.0+ 5*48cf8b83SBin Meng */ 6*48cf8b83SBin Meng 7*48cf8b83SBin Meng #ifndef _QUARK_IOMAP_H_ 8*48cf8b83SBin Meng #define _QUARK_IOMAP_H_ 9*48cf8b83SBin Meng 10*48cf8b83SBin Meng /* Memory Mapped IO bases */ 11*48cf8b83SBin Meng 12*48cf8b83SBin Meng /* ESRAM */ 13*48cf8b83SBin Meng #define ESRAM_BASE_ADDRESS CONFIG_ESRAM_BASE 14*48cf8b83SBin Meng #define ESRAM_BASE_SIZE ESRAM_SIZE 15*48cf8b83SBin Meng 16*48cf8b83SBin Meng /* PCI Configuration Space */ 17*48cf8b83SBin Meng #define MCFG_BASE_ADDRESS CONFIG_PCIE_ECAM_BASE 18*48cf8b83SBin Meng #define MCFG_BASE_SIZE 0x10000000 19*48cf8b83SBin Meng 20*48cf8b83SBin Meng /* High Performance Event Timer */ 21*48cf8b83SBin Meng #define HPET_BASE_ADDRESS 0xfed00000 22*48cf8b83SBin Meng #define HPET_BASE_SIZE 0x400 23*48cf8b83SBin Meng 24*48cf8b83SBin Meng /* Root Complex Base Address */ 25*48cf8b83SBin Meng #define RCBA_BASE_ADDRESS CONFIG_RCBA_BASE 26*48cf8b83SBin Meng #define RCBA_BASE_SIZE 0x4000 27*48cf8b83SBin Meng 28*48cf8b83SBin Meng /* IO Port bases */ 29*48cf8b83SBin Meng #define ACPI_PM1_BASE_ADDRESS CONFIG_ACPI_PM1_BASE 30*48cf8b83SBin Meng #define ACPI_PM1_BASE_SIZE 0x10 31*48cf8b83SBin Meng 32*48cf8b83SBin Meng #define ACPI_PBLK_BASE_ADDRESS CONFIG_ACPI_PBLK_BASE 33*48cf8b83SBin Meng #define ACPI_PBLK_BASE_SIZE 0x10 34*48cf8b83SBin Meng 35*48cf8b83SBin Meng #define SPI_DMA_BASE_ADDRESS CONFIG_SPI_DMA_BASE 36*48cf8b83SBin Meng #define SPI_DMA_BASE_SIZE 0x10 37*48cf8b83SBin Meng 38*48cf8b83SBin Meng #define GPIO_BASE_ADDRESS CONFIG_GPIO_BASE 39*48cf8b83SBin Meng #define GPIO_BASE_SIZE 0x80 40*48cf8b83SBin Meng 41*48cf8b83SBin Meng #define ACPI_GPE0_BASE_ADDRESS CONFIG_ACPI_GPE0_BASE 42*48cf8b83SBin Meng #define ACPI_GPE0_BASE_SIZE 0x40 43*48cf8b83SBin Meng 44*48cf8b83SBin Meng #define WDT_BASE_ADDRESS CONFIG_WDT_BASE 45*48cf8b83SBin Meng #define WDT_BASE_SIZE 0x40 46*48cf8b83SBin Meng 47*48cf8b83SBin Meng #endif /* _QUARK_IOMAP_H_ */ 48