xref: /rk3399_rockchip-uboot/arch/x86/include/asm/arch-quark/acpi/southcluster.asl (revision dc557e9a1fe00ca9d884bd88feef5bebf23fede4)
1*48cf8b83SBin Meng/*
2*48cf8b83SBin Meng * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
3*48cf8b83SBin Meng *
4*48cf8b83SBin Meng * SPDX-License-Identifier:	GPL-2.0+
5*48cf8b83SBin Meng */
6*48cf8b83SBin Meng
7*48cf8b83SBin MengDevice (PCI0)
8*48cf8b83SBin Meng{
9*48cf8b83SBin Meng	Name(_HID, EISAID("PNP0A08"))	/* PCIe */
10*48cf8b83SBin Meng	Name(_CID, EISAID("PNP0A03"))	/* PCI */
11*48cf8b83SBin Meng
12*48cf8b83SBin Meng	Name(_ADR, 0)
13*48cf8b83SBin Meng	Name(_BBN, 0)
14*48cf8b83SBin Meng
15*48cf8b83SBin Meng	Name(MCRS, ResourceTemplate()
16*48cf8b83SBin Meng	{
17*48cf8b83SBin Meng		/* Bus Numbers */
18*48cf8b83SBin Meng		WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode,
19*48cf8b83SBin Meng				0x0000, 0x0000, 0x00ff, 0x0000, 0x0100, , , PB00)
20*48cf8b83SBin Meng
21*48cf8b83SBin Meng		/* IO Region 0 */
22*48cf8b83SBin Meng		WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
23*48cf8b83SBin Meng				0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8, , , PI00)
24*48cf8b83SBin Meng
25*48cf8b83SBin Meng		/* PCI Config Space */
26*48cf8b83SBin Meng		IO(Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
27*48cf8b83SBin Meng
28*48cf8b83SBin Meng		/* IO Region 1 */
29*48cf8b83SBin Meng		WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
30*48cf8b83SBin Meng				0x0000, 0x0d00, 0xffff, 0x0000, 0xf300, , , PI01)
31*48cf8b83SBin Meng
32*48cf8b83SBin Meng		/* VGA memory (0xa0000-0xbffff) */
33*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
34*48cf8b83SBin Meng				Cacheable, ReadWrite,
35*48cf8b83SBin Meng				0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
36*48cf8b83SBin Meng				0x00020000, , , ASEG)
37*48cf8b83SBin Meng
38*48cf8b83SBin Meng		/* OPROM reserved (0xc0000-0xc3fff) */
39*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
40*48cf8b83SBin Meng				Cacheable, ReadWrite,
41*48cf8b83SBin Meng				0x00000000, 0x000c0000, 0x000c3fff, 0x00000000,
42*48cf8b83SBin Meng				0x00004000, , , OPR0)
43*48cf8b83SBin Meng
44*48cf8b83SBin Meng		/* OPROM reserved (0xc4000-0xc7fff) */
45*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
46*48cf8b83SBin Meng				Cacheable, ReadWrite,
47*48cf8b83SBin Meng				0x00000000, 0x000c4000, 0x000c7fff, 0x00000000,
48*48cf8b83SBin Meng				0x00004000, , , OPR1)
49*48cf8b83SBin Meng
50*48cf8b83SBin Meng		/* OPROM reserved (0xc8000-0xcbfff) */
51*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
52*48cf8b83SBin Meng				Cacheable, ReadWrite,
53*48cf8b83SBin Meng				0x00000000, 0x000c8000, 0x000cbfff, 0x00000000,
54*48cf8b83SBin Meng				0x00004000, , , OPR2)
55*48cf8b83SBin Meng
56*48cf8b83SBin Meng		/* OPROM reserved (0xcc000-0xcffff) */
57*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
58*48cf8b83SBin Meng				Cacheable, ReadWrite,
59*48cf8b83SBin Meng				0x00000000, 0x000cc000, 0x000cffff, 0x00000000,
60*48cf8b83SBin Meng				0x00004000, , , OPR3)
61*48cf8b83SBin Meng
62*48cf8b83SBin Meng		/* OPROM reserved (0xd0000-0xd3fff) */
63*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
64*48cf8b83SBin Meng				Cacheable, ReadWrite,
65*48cf8b83SBin Meng				0x00000000, 0x000d0000, 0x000d3fff, 0x00000000,
66*48cf8b83SBin Meng				0x00004000, , , OPR4)
67*48cf8b83SBin Meng
68*48cf8b83SBin Meng		/* OPROM reserved (0xd4000-0xd7fff) */
69*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
70*48cf8b83SBin Meng				Cacheable, ReadWrite,
71*48cf8b83SBin Meng				0x00000000, 0x000d4000, 0x000d7fff, 0x00000000,
72*48cf8b83SBin Meng				0x00004000, , , OPR5)
73*48cf8b83SBin Meng
74*48cf8b83SBin Meng		/* OPROM reserved (0xd8000-0xdbfff) */
75*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
76*48cf8b83SBin Meng				Cacheable, ReadWrite,
77*48cf8b83SBin Meng				0x00000000, 0x000d8000, 0x000dbfff, 0x00000000,
78*48cf8b83SBin Meng				0x00004000, , , OPR6)
79*48cf8b83SBin Meng
80*48cf8b83SBin Meng		/* OPROM reserved (0xdc000-0xdffff) */
81*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
82*48cf8b83SBin Meng				Cacheable, ReadWrite,
83*48cf8b83SBin Meng				0x00000000, 0x000dc000, 0x000dffff, 0x00000000,
84*48cf8b83SBin Meng				0x00004000, , , OPR7)
85*48cf8b83SBin Meng
86*48cf8b83SBin Meng		/* BIOS Extension (0xe0000-0xe3fff) */
87*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
88*48cf8b83SBin Meng				Cacheable, ReadWrite,
89*48cf8b83SBin Meng				0x00000000, 0x000e0000, 0x000e3fff, 0x00000000,
90*48cf8b83SBin Meng				0x00004000, , , ESG0)
91*48cf8b83SBin Meng
92*48cf8b83SBin Meng		/* BIOS Extension (0xe4000-0xe7fff) */
93*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
94*48cf8b83SBin Meng				Cacheable, ReadWrite,
95*48cf8b83SBin Meng				0x00000000, 0x000e4000, 0x000e7fff, 0x00000000,
96*48cf8b83SBin Meng				0x00004000, , , ESG1)
97*48cf8b83SBin Meng
98*48cf8b83SBin Meng		/* BIOS Extension (0xe8000-0xebfff) */
99*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
100*48cf8b83SBin Meng				Cacheable, ReadWrite,
101*48cf8b83SBin Meng				0x00000000, 0x000e8000, 0x000ebfff, 0x00000000,
102*48cf8b83SBin Meng				0x00004000, , , ESG2)
103*48cf8b83SBin Meng
104*48cf8b83SBin Meng		/* BIOS Extension (0xec000-0xeffff) */
105*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
106*48cf8b83SBin Meng				Cacheable, ReadWrite,
107*48cf8b83SBin Meng				0x00000000, 0x000ec000, 0x000effff, 0x00000000,
108*48cf8b83SBin Meng				0x00004000, , , ESG3)
109*48cf8b83SBin Meng
110*48cf8b83SBin Meng		/* System BIOS (0xf0000-0xfffff) */
111*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
112*48cf8b83SBin Meng				Cacheable, ReadWrite,
113*48cf8b83SBin Meng				0x00000000, 0x000f0000, 0x000fffff, 0x00000000,
114*48cf8b83SBin Meng				0x00010000, , , FSEG)
115*48cf8b83SBin Meng
116*48cf8b83SBin Meng		/* PCI Memory Region (TOLM-CONFIG_MMCONF_BASE_ADDRESS) */
117*48cf8b83SBin Meng		DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed,
118*48cf8b83SBin Meng				Cacheable, ReadWrite,
119*48cf8b83SBin Meng				0x00000000, 0x00000000, 0x00000000, 0x00000000,
120*48cf8b83SBin Meng				0x00000000, , , PMEM)
121*48cf8b83SBin Meng	})
122*48cf8b83SBin Meng
123*48cf8b83SBin Meng	Method(_CRS, 0, Serialized)
124*48cf8b83SBin Meng	{
125*48cf8b83SBin Meng		/* Update PCI resource area */
126*48cf8b83SBin Meng		CreateDwordField(MCRS, ^PMEM._MIN, PMIN)
127*48cf8b83SBin Meng		CreateDwordField(MCRS, ^PMEM._MAX, PMAX)
128*48cf8b83SBin Meng		CreateDwordField(MCRS, ^PMEM._LEN, PLEN)
129*48cf8b83SBin Meng
130*48cf8b83SBin Meng		/*
131*48cf8b83SBin Meng		 * Hardcode TOLM to 2GB for now (see DRAM_MAX_SIZE in quark.h)
132*48cf8b83SBin Meng		 *
133*48cf8b83SBin Meng		 * TODO: for generic usage, read TOLM value from register, or
134*48cf8b83SBin Meng		 * from global NVS (not implemented by U-Boot yet).
135*48cf8b83SBin Meng		 */
136*48cf8b83SBin Meng		Store(0x80000000, PMIN)
137*48cf8b83SBin Meng		Store(Subtract(MCFG_BASE_ADDRESS, 1), PMAX)
138*48cf8b83SBin Meng		Add(Subtract(PMAX, PMIN), 1, PLEN)
139*48cf8b83SBin Meng
140*48cf8b83SBin Meng		Return (MCRS)
141*48cf8b83SBin Meng	}
142*48cf8b83SBin Meng
143*48cf8b83SBin Meng	/* Device Resource Consumption */
144*48cf8b83SBin Meng	Device (PDRC)
145*48cf8b83SBin Meng	{
146*48cf8b83SBin Meng		Name(_HID, EISAID("PNP0C02"))
147*48cf8b83SBin Meng		Name(_UID, 1)
148*48cf8b83SBin Meng
149*48cf8b83SBin Meng		Name(PDRS, ResourceTemplate() {
150*48cf8b83SBin Meng			Memory32Fixed(ReadWrite, CONFIG_ESRAM_BASE, 0x80000)
151*48cf8b83SBin Meng			Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE)
152*48cf8b83SBin Meng			Memory32Fixed(ReadWrite, RCBA_BASE_ADDRESS, RCBA_BASE_SIZE)
153*48cf8b83SBin Meng			IO(Decode16, SPI_DMA_BASE_ADDRESS, SPI_DMA_BASE_ADDRESS, 0x0010, SPI_DMA_BASE_SIZE)
154*48cf8b83SBin Meng			IO(Decode16, GPIO_BASE_ADDRESS, GPIO_BASE_ADDRESS, 0x0080, GPIO_BASE_SIZE)
155*48cf8b83SBin Meng			IO(Decode16, WDT_BASE_ADDRESS, WDT_BASE_ADDRESS, 0x0040, WDT_BASE_SIZE)
156*48cf8b83SBin Meng		})
157*48cf8b83SBin Meng
158*48cf8b83SBin Meng		/* Current Resource Settings */
159*48cf8b83SBin Meng		Method(_CRS, 0, Serialized)
160*48cf8b83SBin Meng		{
161*48cf8b83SBin Meng			Return (PDRS)
162*48cf8b83SBin Meng		}
163*48cf8b83SBin Meng	}
164*48cf8b83SBin Meng
165*48cf8b83SBin Meng	Method(_OSC, 4)
166*48cf8b83SBin Meng	{
167*48cf8b83SBin Meng		/* Check for proper GUID */
168*48cf8b83SBin Meng		If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
169*48cf8b83SBin Meng			/* Let OS control everything */
170*48cf8b83SBin Meng			Return (Arg3)
171*48cf8b83SBin Meng		} Else {
172*48cf8b83SBin Meng			/* Unrecognized UUID */
173*48cf8b83SBin Meng			CreateDWordField(Arg3, 0, CDW1)
174*48cf8b83SBin Meng			Or(CDW1, 4, CDW1)
175*48cf8b83SBin Meng			Return (Arg3)
176*48cf8b83SBin Meng		}
177*48cf8b83SBin Meng	}
178*48cf8b83SBin Meng
179*48cf8b83SBin Meng	/* LPC Bridge 0:1f.0 */
180*48cf8b83SBin Meng	#include "lpc.asl"
181*48cf8b83SBin Meng
182*48cf8b83SBin Meng	/* IRQ routing for each PCI device */
183*48cf8b83SBin Meng	#include <asm/acpi/irqroute.asl>
184*48cf8b83SBin Meng}
185