xref: /rk3399_rockchip-uboot/arch/x86/include/asm/arch-broadwell/iomap.h (revision 2f3f477b77d3a528de41e52a8ba874fd47fb6513)
1*2f3f477bSSimon Glass /*
2*2f3f477bSSimon Glass  * From Coreboot soc/intel/broadwell/include/soc/iomap.h
3*2f3f477bSSimon Glass  *
4*2f3f477bSSimon Glass  * Copyright (C) 2016 Google Inc.
5*2f3f477bSSimon Glass  *
6*2f3f477bSSimon Glass  * SPDX-License-Identifier:	BSD-3-Clause
7*2f3f477bSSimon Glass  */
8*2f3f477bSSimon Glass 
9*2f3f477bSSimon Glass #ifndef __asm_arch_iomap_h
10*2f3f477bSSimon Glass #define __asm_arch_iomap_h
11*2f3f477bSSimon Glass 
12*2f3f477bSSimon Glass #define MCFG_BASE_ADDRESS	0xf0000000
13*2f3f477bSSimon Glass #define MCFG_BASE_SIZE		0x4000000
14*2f3f477bSSimon Glass 
15*2f3f477bSSimon Glass #define HPET_BASE_ADDRESS	0xfed00000
16*2f3f477bSSimon Glass 
17*2f3f477bSSimon Glass #define MCH_BASE_ADDRESS	0xfed10000
18*2f3f477bSSimon Glass #define MCH_BASE_SIZE		0x8000
19*2f3f477bSSimon Glass 
20*2f3f477bSSimon Glass #define DMI_BASE_ADDRESS	0xfed18000
21*2f3f477bSSimon Glass #define DMI_BASE_SIZE		0x1000
22*2f3f477bSSimon Glass 
23*2f3f477bSSimon Glass #define EP_BASE_ADDRESS		0xfed19000
24*2f3f477bSSimon Glass #define EP_BASE_SIZE		0x1000
25*2f3f477bSSimon Glass 
26*2f3f477bSSimon Glass #define EDRAM_BASE_ADDRESS	0xfed80000
27*2f3f477bSSimon Glass #define EDRAM_BASE_SIZE		0x4000
28*2f3f477bSSimon Glass 
29*2f3f477bSSimon Glass #define GDXC_BASE_ADDRESS	0xfed84000
30*2f3f477bSSimon Glass #define GDXC_BASE_SIZE		0x1000
31*2f3f477bSSimon Glass 
32*2f3f477bSSimon Glass #define RCBA_BASE_ADDRESS	0xfed1c000
33*2f3f477bSSimon Glass #define RCBA_BASE_SIZE		0x4000
34*2f3f477bSSimon Glass 
35*2f3f477bSSimon Glass #define HPET_BASE_ADDRESS	0xfed00000
36*2f3f477bSSimon Glass 
37*2f3f477bSSimon Glass #define ACPI_BASE_ADDRESS	0x1000
38*2f3f477bSSimon Glass #define ACPI_BASE_SIZE		0x100
39*2f3f477bSSimon Glass 
40*2f3f477bSSimon Glass #define GPIO_BASE_ADDRESS	0x1400
41*2f3f477bSSimon Glass #define GPIO_BASE_SIZE		0x400
42*2f3f477bSSimon Glass 
43*2f3f477bSSimon Glass #define SMBUS_BASE_ADDRESS	0x0400
44*2f3f477bSSimon Glass #define SMBUS_BASE_SIZE		0x10
45*2f3f477bSSimon Glass 
46*2f3f477bSSimon Glass /* Temporary addresses used before relocation */
47*2f3f477bSSimon Glass #define EARLY_GTT_BAR		0xe0000000
48*2f3f477bSSimon Glass #define EARLY_XHCI_BAR		0xd7000000
49*2f3f477bSSimon Glass #define EARLY_EHCI_BAR		0xd8000000
50*2f3f477bSSimon Glass #define EARLY_UART_BAR		0x3f8
51*2f3f477bSSimon Glass #define EARLY_TEMP_MMIO		0xfed08000
52*2f3f477bSSimon Glass 
53*2f3f477bSSimon Glass #endif
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