xref: /rk3399_rockchip-uboot/arch/x86/cpu/tangier/tangier.c (revision e71de54a4943ac481e8bcdb0a132c52ab90f23fe) 
1*e71de54aSFelipe Balbi /*
2*e71de54aSFelipe Balbi  * Copyright (c) 2017 Intel Corporation
3*e71de54aSFelipe Balbi  *
4*e71de54aSFelipe Balbi  * SPDX-License-Identifier:	GPL-2.0+
5*e71de54aSFelipe Balbi  */
6*e71de54aSFelipe Balbi 
7*e71de54aSFelipe Balbi #include <common.h>
8*e71de54aSFelipe Balbi #include <asm/scu.h>
9*e71de54aSFelipe Balbi #include <asm/u-boot-x86.h>
10*e71de54aSFelipe Balbi 
11*e71de54aSFelipe Balbi DECLARE_GLOBAL_DATA_PTR;
12*e71de54aSFelipe Balbi 
13*e71de54aSFelipe Balbi /*
14*e71de54aSFelipe Balbi  * Miscellaneous platform dependent initializations
15*e71de54aSFelipe Balbi  */
arch_cpu_init(void)16*e71de54aSFelipe Balbi int arch_cpu_init(void)
17*e71de54aSFelipe Balbi {
18*e71de54aSFelipe Balbi 	return x86_cpu_init_f();
19*e71de54aSFelipe Balbi }
20*e71de54aSFelipe Balbi 
checkcpu(void)21*e71de54aSFelipe Balbi int checkcpu(void)
22*e71de54aSFelipe Balbi {
23*e71de54aSFelipe Balbi 	return 0;
24*e71de54aSFelipe Balbi }
25*e71de54aSFelipe Balbi 
print_cpuinfo(void)26*e71de54aSFelipe Balbi int print_cpuinfo(void)
27*e71de54aSFelipe Balbi {
28*e71de54aSFelipe Balbi 	return default_print_cpuinfo();
29*e71de54aSFelipe Balbi }
30*e71de54aSFelipe Balbi 
reset_cpu(ulong addr)31*e71de54aSFelipe Balbi void reset_cpu(ulong addr)
32*e71de54aSFelipe Balbi {
33*e71de54aSFelipe Balbi 	scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
34*e71de54aSFelipe Balbi }
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