1# 2# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3# 4# SPDX-License-Identifier: GPL-2.0+ 5# 6 7config INTEL_QUARK 8 bool 9 select HAVE_RMU 10 select ARCH_EARLY_INIT_R 11 select ARCH_MISC_INIT 12 imply ENABLE_MRC_CACHE 13 14if INTEL_QUARK 15 16config HAVE_RMU 17 bool "Add a Remote Management Unit (RMU) binary" 18 help 19 Select this option to add a Remote Management Unit (RMU) binary 20 to the resulting U-Boot image. It is a data block (up to 64K) of 21 machine-specific code which must be put in the flash for the RMU 22 within the Quark SoC processor to access when powered up before 23 system BIOS is executed. 24 25config RMU_FILE 26 string "Remote Management Unit (RMU) binary filename" 27 depends on HAVE_RMU 28 default "rmu.bin" 29 help 30 The filename of the file to use as Remote Management Unit (RMU) 31 binary in the board directory. 32 33config RMU_ADDR 34 hex "Remote Management Unit (RMU) binary location" 35 depends on HAVE_RMU 36 default 0xfff00000 37 help 38 The location of the RMU binary is determined by a strap. It must be 39 put in flash at a location matching the strap-determined base address. 40 41 The default base address of 0xfff00000 indicates that the binary must 42 be located at offset 0 from the beginning of a 1MB flash device. 43 44config HAVE_CMC 45 bool 46 default HAVE_RMU 47 48config CMC_FILE 49 string 50 depends on HAVE_CMC 51 default RMU_FILE 52 53config CMC_ADDR 54 hex 55 depends on HAVE_CMC 56 default RMU_ADDR 57 58config ESRAM_BASE 59 hex 60 default 0x80000000 61 help 62 Embedded SRAM (eSRAM) memory-mapped base address. 63 64config PCIE_ECAM_BASE 65 hex 66 default 0xe0000000 67 68config RCBA_BASE 69 hex 70 default 0xfed1c000 71 help 72 Root Complex register block memory-mapped base address. 73 74config ACPI_PM1_BASE 75 hex 76 default 0x1000 77 help 78 ACPI Power Managment 1 (PM1) i/o-mapped base address. 79 This device is defined in ACPI specification, with 16 bytes in size. 80 81config ACPI_PBLK_BASE 82 hex 83 default 0x1010 84 help 85 ACPI Processor Block (PBLK) i/o-mapped base address. 86 This device is defined in ACPI specification, with 16 bytes in size. 87 88config SPI_DMA_BASE 89 hex 90 default 0x1020 91 help 92 SPI DMA i/o-mapped base address. 93 94config GPIO_BASE 95 hex 96 default 0x1080 97 help 98 GPIO i/o-mapped base address. 99 100config ACPI_GPE0_BASE 101 hex 102 default 0x1100 103 help 104 ACPI General Purpose Event 0 (GPE0) i/o-mapped base address. 105 This device is defined in ACPI specification, with 64 bytes in size. 106 107config WDT_BASE 108 hex 109 default 0x1140 110 help 111 Watchdog timer i/o-mapped base address. 112 113config SYS_CAR_ADDR 114 hex 115 default ESRAM_BASE 116 117config SYS_CAR_SIZE 118 hex 119 default 0x8000 120 help 121 Space in bytes in eSRAM used as Cache-As-ARM (CAR). 122 Note this size must not exceed eSRAM's total size. 123 124endif 125