18c30b571SSimon Glass /* 28c30b571SSimon Glass * Copyright (c) 2016 Google, Inc 38c30b571SSimon Glass * 48c30b571SSimon Glass * SPDX-License-Identifier: GPL-2.0 58c30b571SSimon Glass */ 68c30b571SSimon Glass 78c30b571SSimon Glass #include <common.h> 88c30b571SSimon Glass #include <dm.h> 98c30b571SSimon Glass #include <errno.h> 108c30b571SSimon Glass #include <fdtdec.h> 118c30b571SSimon Glass #include <pch.h> 128c30b571SSimon Glass #include <pci.h> 138c30b571SSimon Glass #include <asm/intel_regs.h> 148c30b571SSimon Glass #include <asm/io.h> 158c30b571SSimon Glass #include <asm/lpc_common.h> 168c30b571SSimon Glass 178c30b571SSimon Glass DECLARE_GLOBAL_DATA_PTR; 188c30b571SSimon Glass 198c30b571SSimon Glass /* Enable Prefetching and Caching */ 208c30b571SSimon Glass static void enable_spi_prefetch(struct udevice *pch) 218c30b571SSimon Glass { 228c30b571SSimon Glass u8 reg8; 238c30b571SSimon Glass 248c30b571SSimon Glass dm_pci_read_config8(pch, 0xdc, ®8); 258c30b571SSimon Glass reg8 &= ~(3 << 2); 268c30b571SSimon Glass reg8 |= (2 << 2); /* Prefetching and Caching Enabled */ 278c30b571SSimon Glass dm_pci_write_config8(pch, 0xdc, reg8); 288c30b571SSimon Glass } 298c30b571SSimon Glass 308c30b571SSimon Glass static void enable_port80_on_lpc(struct udevice *pch) 318c30b571SSimon Glass { 328c30b571SSimon Glass /* Enable port 80 POST on LPC */ 338c30b571SSimon Glass dm_pci_write_config32(pch, PCH_RCBA_BASE, RCB_BASE_ADDRESS | 1); 348c30b571SSimon Glass clrbits_le32(RCB_REG(GCS), 4); 358c30b571SSimon Glass } 368c30b571SSimon Glass 378c30b571SSimon Glass /** 388c30b571SSimon Glass * lpc_early_init() - set up LPC serial ports and other early things 398c30b571SSimon Glass * 408c30b571SSimon Glass * @dev: LPC device 418c30b571SSimon Glass * @return 0 if OK, -ve on error 428c30b571SSimon Glass */ 438c30b571SSimon Glass int lpc_common_early_init(struct udevice *dev) 448c30b571SSimon Glass { 458c30b571SSimon Glass struct udevice *pch = dev->parent; 468c30b571SSimon Glass struct reg_info { 478c30b571SSimon Glass u32 base; 488c30b571SSimon Glass u32 size; 498c30b571SSimon Glass } values[4], *ptr; 508c30b571SSimon Glass int count; 518c30b571SSimon Glass int i; 528c30b571SSimon Glass 53*e160f7d4SSimon Glass count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev), 548c30b571SSimon Glass "intel,gen-dec", (u32 *)values, 558c30b571SSimon Glass sizeof(values) / sizeof(u32)); 568c30b571SSimon Glass if (count < 0) 578c30b571SSimon Glass return -EINVAL; 588c30b571SSimon Glass 598c30b571SSimon Glass /* Set COM1/COM2 decode range */ 608c30b571SSimon Glass dm_pci_write_config16(pch, LPC_IO_DEC, 0x0010); 618c30b571SSimon Glass 628c30b571SSimon Glass /* Enable PS/2 Keyboard/Mouse, EC areas and COM1 */ 638c30b571SSimon Glass dm_pci_write_config16(pch, LPC_EN, KBC_LPC_EN | MC_LPC_EN | 648c30b571SSimon Glass GAMEL_LPC_EN | COMA_LPC_EN); 658c30b571SSimon Glass 668c30b571SSimon Glass /* Write all registers but use 0 if we run out of data */ 678c30b571SSimon Glass count = count * sizeof(u32) / sizeof(values[0]); 688c30b571SSimon Glass for (i = 0, ptr = values; i < ARRAY_SIZE(values); i++, ptr++) { 698c30b571SSimon Glass u32 reg = 0; 708c30b571SSimon Glass 718c30b571SSimon Glass if (i < count) 728c30b571SSimon Glass reg = ptr->base | PCI_COMMAND_IO | (ptr->size << 16); 738c30b571SSimon Glass dm_pci_write_config32(pch, LPC_GENX_DEC(i), reg); 748c30b571SSimon Glass } 758c30b571SSimon Glass 768c30b571SSimon Glass enable_spi_prefetch(pch); 778c30b571SSimon Glass 788c30b571SSimon Glass /* This is already done in start.S, but let's do it in C */ 798c30b571SSimon Glass enable_port80_on_lpc(pch); 808c30b571SSimon Glass 818c30b571SSimon Glass return 0; 828c30b571SSimon Glass } 838c30b571SSimon Glass 848c30b571SSimon Glass int lpc_set_spi_protect(struct udevice *dev, int bios_ctrl, bool protect) 858c30b571SSimon Glass { 868c30b571SSimon Glass uint8_t bios_cntl; 878c30b571SSimon Glass 888c30b571SSimon Glass /* Adjust the BIOS write protect and SMM BIOS Write Protect Disable */ 898c30b571SSimon Glass dm_pci_read_config8(dev, bios_ctrl, &bios_cntl); 908c30b571SSimon Glass if (protect) { 918c30b571SSimon Glass bios_cntl &= ~BIOS_CTRL_BIOSWE; 928c30b571SSimon Glass bios_cntl |= BIT(5); 938c30b571SSimon Glass } else { 948c30b571SSimon Glass bios_cntl |= BIOS_CTRL_BIOSWE; 958c30b571SSimon Glass bios_cntl &= ~BIT(5); 968c30b571SSimon Glass } 978c30b571SSimon Glass dm_pci_write_config8(dev, bios_ctrl, bios_cntl); 988c30b571SSimon Glass 998c30b571SSimon Glass return 0; 1008c30b571SSimon Glass } 101