1fea25720SGraeme Russ /* 2fea25720SGraeme Russ * (C) Copyright 2008-2011 3fea25720SGraeme Russ * Graeme Russ, <graeme.russ@gmail.com> 4fea25720SGraeme Russ * 5fea25720SGraeme Russ * (C) Copyright 2002 6*fa82f871SAlbert ARIBAUD * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> 7fea25720SGraeme Russ * 8fea25720SGraeme Russ * (C) Copyright 2002 9fea25720SGraeme Russ * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 10fea25720SGraeme Russ * Marius Groeger <mgroeger@sysgo.de> 11fea25720SGraeme Russ * 12fea25720SGraeme Russ * (C) Copyright 2002 13fea25720SGraeme Russ * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 14fea25720SGraeme Russ * Alex Zuepke <azu@sysgo.de> 15fea25720SGraeme Russ * 16fea25720SGraeme Russ * See file CREDITS for list of people who contributed to this 17fea25720SGraeme Russ * project. 18fea25720SGraeme Russ * 19fea25720SGraeme Russ * This program is free software; you can redistribute it and/or 20fea25720SGraeme Russ * modify it under the terms of the GNU General Public License as 21fea25720SGraeme Russ * published by the Free Software Foundation; either version 2 of 22fea25720SGraeme Russ * the License, or (at your option) any later version. 23fea25720SGraeme Russ * 24fea25720SGraeme Russ * This program is distributed in the hope that it will be useful, 25fea25720SGraeme Russ * but WITHOUT ANY WARRANTY; without even the implied warranty of 26fea25720SGraeme Russ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 27fea25720SGraeme Russ * GNU General Public License for more details. 28fea25720SGraeme Russ * 29fea25720SGraeme Russ * You should have received a copy of the GNU General Public License 30fea25720SGraeme Russ * along with this program; if not, write to the Free Software 31fea25720SGraeme Russ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 32fea25720SGraeme Russ * MA 02111-1307 USA 33fea25720SGraeme Russ */ 34fea25720SGraeme Russ 35fea25720SGraeme Russ #include <common.h> 36fea25720SGraeme Russ #include <command.h> 37fea25720SGraeme Russ #include <asm/processor.h> 38fea25720SGraeme Russ #include <asm/processor-flags.h> 39fea25720SGraeme Russ #include <asm/interrupt.h> 40fea25720SGraeme Russ 41fea25720SGraeme Russ /* 42fea25720SGraeme Russ * Constructor for a conventional segment GDT (or LDT) entry 43fea25720SGraeme Russ * This is a macro so it can be used in initialisers 44fea25720SGraeme Russ */ 45fea25720SGraeme Russ #define GDT_ENTRY(flags, base, limit) \ 46fea25720SGraeme Russ ((((base) & 0xff000000ULL) << (56-24)) | \ 47fea25720SGraeme Russ (((flags) & 0x0000f0ffULL) << 40) | \ 48fea25720SGraeme Russ (((limit) & 0x000f0000ULL) << (48-16)) | \ 49fea25720SGraeme Russ (((base) & 0x00ffffffULL) << 16) | \ 50fea25720SGraeme Russ (((limit) & 0x0000ffffULL))) 51fea25720SGraeme Russ 52fea25720SGraeme Russ struct gdt_ptr { 53fea25720SGraeme Russ u16 len; 54fea25720SGraeme Russ u32 ptr; 55fea25720SGraeme Russ } __attribute__((packed)); 56fea25720SGraeme Russ 57fea25720SGraeme Russ static void reload_gdt(void) 58fea25720SGraeme Russ { 59fea25720SGraeme Russ /* 60fea25720SGraeme Russ * There are machines which are known to not boot with the GDT 61fea25720SGraeme Russ * being 8-byte unaligned. Intel recommends 16 byte alignment 62fea25720SGraeme Russ */ 63fea25720SGraeme Russ static const u64 boot_gdt[] __attribute__((aligned(16))) = { 64fea25720SGraeme Russ /* CS: code, read/execute, 4 GB, base 0 */ 65fea25720SGraeme Russ [GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff), 66fea25720SGraeme Russ /* DS: data, read/write, 4 GB, base 0 */ 67fea25720SGraeme Russ [GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff), 68fea25720SGraeme Russ /* 16-bit CS: code, read/execute, 64 kB, base 0 */ 69fea25720SGraeme Russ [GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff), 70fea25720SGraeme Russ /* 16-bit DS: data, read/write, 64 kB, base 0 */ 71fea25720SGraeme Russ [GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x1093, 0, 0x0ffff), 72fea25720SGraeme Russ }; 73fea25720SGraeme Russ static struct gdt_ptr gdt; 74fea25720SGraeme Russ 75fea25720SGraeme Russ gdt.len = sizeof(boot_gdt)-1; 76fea25720SGraeme Russ gdt.ptr = (u32)&boot_gdt; 77fea25720SGraeme Russ 78fea25720SGraeme Russ asm volatile("lgdtl %0\n" \ 79fea25720SGraeme Russ "movl $((2+1)*8), %%ecx\n" \ 80fea25720SGraeme Russ "movl %%ecx, %%ds\n" \ 81fea25720SGraeme Russ "movl %%ecx, %%es\n" \ 82fea25720SGraeme Russ "movl %%ecx, %%fs\n" \ 83fea25720SGraeme Russ "movl %%ecx, %%gs\n" \ 84fea25720SGraeme Russ "movl %%ecx, %%ss" \ 85fea25720SGraeme Russ : : "m" (gdt) : "ecx"); 86fea25720SGraeme Russ } 87fea25720SGraeme Russ 88fea25720SGraeme Russ int x86_cpu_init_f(void) 89fea25720SGraeme Russ { 90fea25720SGraeme Russ const u32 em_rst = ~X86_CR0_EM; 91fea25720SGraeme Russ const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE; 92fea25720SGraeme Russ 93fea25720SGraeme Russ /* initialize FPU, reset EM, set MP and NE */ 94fea25720SGraeme Russ asm ("fninit\n" \ 95fea25720SGraeme Russ "movl %%cr0, %%eax\n" \ 96fea25720SGraeme Russ "andl %0, %%eax\n" \ 97fea25720SGraeme Russ "orl %1, %%eax\n" \ 98fea25720SGraeme Russ "movl %%eax, %%cr0\n" \ 99fea25720SGraeme Russ : : "i" (em_rst), "i" (mp_ne_set) : "eax"); 100fea25720SGraeme Russ 101fea25720SGraeme Russ return 0; 102fea25720SGraeme Russ } 103fea25720SGraeme Russ int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f"))); 104fea25720SGraeme Russ 105fea25720SGraeme Russ int x86_cpu_init_r(void) 106fea25720SGraeme Russ { 107fea25720SGraeme Russ const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD); 108fea25720SGraeme Russ 109fea25720SGraeme Russ /* turn on the cache and disable write through */ 110fea25720SGraeme Russ asm("movl %%cr0, %%eax\n" 111fea25720SGraeme Russ "andl %0, %%eax\n" 112fea25720SGraeme Russ "movl %%eax, %%cr0\n" 113fea25720SGraeme Russ "wbinvd\n" : : "i" (nw_cd_rst) : "eax"); 114fea25720SGraeme Russ 115fea25720SGraeme Russ reload_gdt(); 116fea25720SGraeme Russ 117fea25720SGraeme Russ /* Initialize core interrupt and exception functionality of CPU */ 118fea25720SGraeme Russ cpu_init_interrupts (); 119fea25720SGraeme Russ return 0; 120fea25720SGraeme Russ } 121fea25720SGraeme Russ int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r"))); 122fea25720SGraeme Russ 123fea25720SGraeme Russ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 124fea25720SGraeme Russ { 125fea25720SGraeme Russ printf ("resetting ...\n"); 126fea25720SGraeme Russ 127fea25720SGraeme Russ /* wait 50 ms */ 128fea25720SGraeme Russ udelay(50000); 129fea25720SGraeme Russ disable_interrupts(); 130fea25720SGraeme Russ reset_cpu(0); 131fea25720SGraeme Russ 132fea25720SGraeme Russ /*NOTREACHED*/ 133fea25720SGraeme Russ return 0; 134fea25720SGraeme Russ } 135fea25720SGraeme Russ 136fea25720SGraeme Russ void flush_cache (unsigned long dummy1, unsigned long dummy2) 137fea25720SGraeme Russ { 138fea25720SGraeme Russ asm("wbinvd\n"); 139fea25720SGraeme Russ } 140fea25720SGraeme Russ 141fea25720SGraeme Russ void __attribute__ ((regparm(0))) generate_gpf(void); 142fea25720SGraeme Russ 143fea25720SGraeme Russ /* segment 0x70 is an arbitrary segment which does not exist */ 144fea25720SGraeme Russ asm(".globl generate_gpf\n" 145fea25720SGraeme Russ ".hidden generate_gpf\n" 146fea25720SGraeme Russ ".type generate_gpf, @function\n" 147fea25720SGraeme Russ "generate_gpf:\n" 148fea25720SGraeme Russ "ljmp $0x70, $0x47114711\n"); 149fea25720SGraeme Russ 150fea25720SGraeme Russ void __reset_cpu(ulong addr) 151fea25720SGraeme Russ { 152fea25720SGraeme Russ printf("Resetting using x86 Triple Fault\n"); 153fea25720SGraeme Russ set_vector(13, generate_gpf); /* general protection fault handler */ 154fea25720SGraeme Russ set_vector(8, generate_gpf); /* double fault handler */ 155fea25720SGraeme Russ generate_gpf(); /* start the show */ 156fea25720SGraeme Russ } 157fea25720SGraeme Russ void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu"))); 158