xref: /rk3399_rockchip-uboot/arch/x86/cpu/cpu.c (revision 7949703a9582ec60cf841c595acd3bbe86933cd3)
1fea25720SGraeme Russ /*
2fea25720SGraeme Russ  * (C) Copyright 2008-2011
3fea25720SGraeme Russ  * Graeme Russ, <graeme.russ@gmail.com>
4fea25720SGraeme Russ  *
5fea25720SGraeme Russ  * (C) Copyright 2002
6fa82f871SAlbert ARIBAUD  * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
7fea25720SGraeme Russ  *
8fea25720SGraeme Russ  * (C) Copyright 2002
9fea25720SGraeme Russ  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10fea25720SGraeme Russ  * Marius Groeger <mgroeger@sysgo.de>
11fea25720SGraeme Russ  *
12fea25720SGraeme Russ  * (C) Copyright 2002
13fea25720SGraeme Russ  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
14fea25720SGraeme Russ  * Alex Zuepke <azu@sysgo.de>
15fea25720SGraeme Russ  *
16fea25720SGraeme Russ  * See file CREDITS for list of people who contributed to this
17fea25720SGraeme Russ  * project.
18fea25720SGraeme Russ  *
19fea25720SGraeme Russ  * This program is free software; you can redistribute it and/or
20fea25720SGraeme Russ  * modify it under the terms of the GNU General Public License as
21fea25720SGraeme Russ  * published by the Free Software Foundation; either version 2 of
22fea25720SGraeme Russ  * the License, or (at your option) any later version.
23fea25720SGraeme Russ  *
24fea25720SGraeme Russ  * This program is distributed in the hope that it will be useful,
25fea25720SGraeme Russ  * but WITHOUT ANY WARRANTY; without even the implied warranty of
26fea25720SGraeme Russ  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
27fea25720SGraeme Russ  * GNU General Public License for more details.
28fea25720SGraeme Russ  *
29fea25720SGraeme Russ  * You should have received a copy of the GNU General Public License
30fea25720SGraeme Russ  * along with this program; if not, write to the Free Software
31fea25720SGraeme Russ  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32fea25720SGraeme Russ  * MA 02111-1307 USA
33fea25720SGraeme Russ  */
34fea25720SGraeme Russ 
35fea25720SGraeme Russ #include <common.h>
36fea25720SGraeme Russ #include <command.h>
37095593c0SStefan Reinauer #include <asm/control_regs.h>
38fea25720SGraeme Russ #include <asm/processor.h>
39fea25720SGraeme Russ #include <asm/processor-flags.h>
40fea25720SGraeme Russ #include <asm/interrupt.h>
4160a9b6bfSGabe Black #include <linux/compiler.h>
42fea25720SGraeme Russ 
43fea25720SGraeme Russ /*
44fea25720SGraeme Russ  * Constructor for a conventional segment GDT (or LDT) entry
45fea25720SGraeme Russ  * This is a macro so it can be used in initialisers
46fea25720SGraeme Russ  */
47fea25720SGraeme Russ #define GDT_ENTRY(flags, base, limit)			\
48fea25720SGraeme Russ 	((((base)  & 0xff000000ULL) << (56-24)) |	\
49fea25720SGraeme Russ 	 (((flags) & 0x0000f0ffULL) << 40) |		\
50fea25720SGraeme Russ 	 (((limit) & 0x000f0000ULL) << (48-16)) |	\
51fea25720SGraeme Russ 	 (((base)  & 0x00ffffffULL) << 16) |		\
52fea25720SGraeme Russ 	 (((limit) & 0x0000ffffULL)))
53fea25720SGraeme Russ 
54fea25720SGraeme Russ struct gdt_ptr {
55fea25720SGraeme Russ 	u16 len;
56fea25720SGraeme Russ 	u32 ptr;
57717979fdSGraeme Russ } __packed;
58fea25720SGraeme Russ 
5974bfbe1bSGraeme Russ static void load_ds(u32 segment)
60fea25720SGraeme Russ {
6174bfbe1bSGraeme Russ 	asm volatile("movl %0, %%ds" : : "r" (segment * X86_GDT_ENTRY_SIZE));
6274bfbe1bSGraeme Russ }
63fea25720SGraeme Russ 
6474bfbe1bSGraeme Russ static void load_es(u32 segment)
6574bfbe1bSGraeme Russ {
6674bfbe1bSGraeme Russ 	asm volatile("movl %0, %%es" : : "r" (segment * X86_GDT_ENTRY_SIZE));
6774bfbe1bSGraeme Russ }
68fea25720SGraeme Russ 
6974bfbe1bSGraeme Russ static void load_fs(u32 segment)
7074bfbe1bSGraeme Russ {
7174bfbe1bSGraeme Russ 	asm volatile("movl %0, %%fs" : : "r" (segment * X86_GDT_ENTRY_SIZE));
7274bfbe1bSGraeme Russ }
7374bfbe1bSGraeme Russ 
7474bfbe1bSGraeme Russ static void load_gs(u32 segment)
7574bfbe1bSGraeme Russ {
7674bfbe1bSGraeme Russ 	asm volatile("movl %0, %%gs" : : "r" (segment * X86_GDT_ENTRY_SIZE));
7774bfbe1bSGraeme Russ }
7874bfbe1bSGraeme Russ 
7974bfbe1bSGraeme Russ static void load_ss(u32 segment)
8074bfbe1bSGraeme Russ {
8174bfbe1bSGraeme Russ 	asm volatile("movl %0, %%ss" : : "r" (segment * X86_GDT_ENTRY_SIZE));
8274bfbe1bSGraeme Russ }
8374bfbe1bSGraeme Russ 
8474bfbe1bSGraeme Russ static void load_gdt(const u64 *boot_gdt, u16 num_entries)
8574bfbe1bSGraeme Russ {
8674bfbe1bSGraeme Russ 	struct gdt_ptr gdt;
8774bfbe1bSGraeme Russ 
8874bfbe1bSGraeme Russ 	gdt.len = (num_entries * 8) - 1;
8974bfbe1bSGraeme Russ 	gdt.ptr = (u32)boot_gdt;
9074bfbe1bSGraeme Russ 
9174bfbe1bSGraeme Russ 	asm volatile("lgdtl %0\n" : : "m" (gdt));
92fea25720SGraeme Russ }
93fea25720SGraeme Russ 
949e6c572fSGraeme Russ void setup_gdt(gd_t *id, u64 *gdt_addr)
959e6c572fSGraeme Russ {
969e6c572fSGraeme Russ 	/* CS: code, read/execute, 4 GB, base 0 */
979e6c572fSGraeme Russ 	gdt_addr[X86_GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff);
989e6c572fSGraeme Russ 
999e6c572fSGraeme Russ 	/* DS: data, read/write, 4 GB, base 0 */
1009e6c572fSGraeme Russ 	gdt_addr[X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff);
1019e6c572fSGraeme Russ 
1029e6c572fSGraeme Russ 	/* FS: data, read/write, 4 GB, base (Global Data Pointer) */
1035a35e6c4SSimon Glass 	id->arch.gd_addr = id;
1040cecc3b6SSimon Glass 	gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093,
1055a35e6c4SSimon Glass 		     (ulong)&id->arch.gd_addr, 0xfffff);
1069e6c572fSGraeme Russ 
1079e6c572fSGraeme Russ 	/* 16-bit CS: code, read/execute, 64 kB, base 0 */
1089e6c572fSGraeme Russ 	gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff);
1099e6c572fSGraeme Russ 
1109e6c572fSGraeme Russ 	/* 16-bit DS: data, read/write, 64 kB, base 0 */
1119e6c572fSGraeme Russ 	gdt_addr[X86_GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x1093, 0, 0x0ffff);
1129e6c572fSGraeme Russ 
1139e6c572fSGraeme Russ 	load_gdt(gdt_addr, X86_GDT_NUM_ENTRIES);
1149e6c572fSGraeme Russ 	load_ds(X86_GDT_ENTRY_32BIT_DS);
1159e6c572fSGraeme Russ 	load_es(X86_GDT_ENTRY_32BIT_DS);
1169e6c572fSGraeme Russ 	load_gs(X86_GDT_ENTRY_32BIT_DS);
1179e6c572fSGraeme Russ 	load_ss(X86_GDT_ENTRY_32BIT_DS);
1189e6c572fSGraeme Russ 	load_fs(X86_GDT_ENTRY_32BIT_FS);
1199e6c572fSGraeme Russ }
1209e6c572fSGraeme Russ 
121f30fc4deSGabe Black int __weak x86_cleanup_before_linux(void)
122f30fc4deSGabe Black {
123*7949703aSSimon Glass #ifdef CONFIG_BOOTSTAGE_STASH
124*7949703aSSimon Glass 	bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH,
125*7949703aSSimon Glass 			CONFIG_BOOTSTAGE_STASH_SIZE);
126*7949703aSSimon Glass #endif
127*7949703aSSimon Glass 
128f30fc4deSGabe Black 	return 0;
129f30fc4deSGabe Black }
130f30fc4deSGabe Black 
131fea25720SGraeme Russ int x86_cpu_init_f(void)
132fea25720SGraeme Russ {
133fea25720SGraeme Russ 	const u32 em_rst = ~X86_CR0_EM;
134fea25720SGraeme Russ 	const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE;
135fea25720SGraeme Russ 
136fea25720SGraeme Russ 	/* initialize FPU, reset EM, set MP and NE */
137fea25720SGraeme Russ 	asm ("fninit\n" \
138fea25720SGraeme Russ 	     "movl %%cr0, %%eax\n" \
139fea25720SGraeme Russ 	     "andl %0, %%eax\n" \
140fea25720SGraeme Russ 	     "orl  %1, %%eax\n" \
141fea25720SGraeme Russ 	     "movl %%eax, %%cr0\n" \
142fea25720SGraeme Russ 	     : : "i" (em_rst), "i" (mp_ne_set) : "eax");
143fea25720SGraeme Russ 
144fea25720SGraeme Russ 	return 0;
145fea25720SGraeme Russ }
146fea25720SGraeme Russ int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f")));
147fea25720SGraeme Russ 
148fea25720SGraeme Russ int x86_cpu_init_r(void)
149fea25720SGraeme Russ {
150d653244bSGraeme Russ 	/* Initialize core interrupt and exception functionality of CPU */
151d653244bSGraeme Russ 	cpu_init_interrupts();
152d653244bSGraeme Russ 	return 0;
153d653244bSGraeme Russ }
154d653244bSGraeme Russ int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r")));
155d653244bSGraeme Russ 
156d653244bSGraeme Russ void x86_enable_caches(void)
157d653244bSGraeme Russ {
158095593c0SStefan Reinauer 	unsigned long cr0;
159fea25720SGraeme Russ 
160095593c0SStefan Reinauer 	cr0 = read_cr0();
161095593c0SStefan Reinauer 	cr0 &= ~(X86_CR0_NW | X86_CR0_CD);
162095593c0SStefan Reinauer 	write_cr0(cr0);
163095593c0SStefan Reinauer 	wbinvd();
164d653244bSGraeme Russ }
165d653244bSGraeme Russ void enable_caches(void) __attribute__((weak, alias("x86_enable_caches")));
166fea25720SGraeme Russ 
167095593c0SStefan Reinauer void x86_disable_caches(void)
168095593c0SStefan Reinauer {
169095593c0SStefan Reinauer 	unsigned long cr0;
170095593c0SStefan Reinauer 
171095593c0SStefan Reinauer 	cr0 = read_cr0();
172095593c0SStefan Reinauer 	cr0 |= X86_CR0_NW | X86_CR0_CD;
173095593c0SStefan Reinauer 	wbinvd();
174095593c0SStefan Reinauer 	write_cr0(cr0);
175095593c0SStefan Reinauer 	wbinvd();
176095593c0SStefan Reinauer }
177095593c0SStefan Reinauer void disable_caches(void) __attribute__((weak, alias("x86_disable_caches")));
178095593c0SStefan Reinauer 
179d653244bSGraeme Russ int x86_init_cache(void)
180d653244bSGraeme Russ {
181d653244bSGraeme Russ 	enable_caches();
182d653244bSGraeme Russ 
183fea25720SGraeme Russ 	return 0;
184fea25720SGraeme Russ }
185d653244bSGraeme Russ int init_cache(void) __attribute__((weak, alias("x86_init_cache")));
186fea25720SGraeme Russ 
187fea25720SGraeme Russ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
188fea25720SGraeme Russ {
189fea25720SGraeme Russ 	printf("resetting ...\n");
190fea25720SGraeme Russ 
191fea25720SGraeme Russ 	/* wait 50 ms */
192fea25720SGraeme Russ 	udelay(50000);
193fea25720SGraeme Russ 	disable_interrupts();
194fea25720SGraeme Russ 	reset_cpu(0);
195fea25720SGraeme Russ 
196fea25720SGraeme Russ 	/*NOTREACHED*/
197fea25720SGraeme Russ 	return 0;
198fea25720SGraeme Russ }
199fea25720SGraeme Russ 
200fea25720SGraeme Russ void  flush_cache(unsigned long dummy1, unsigned long dummy2)
201fea25720SGraeme Russ {
202fea25720SGraeme Russ 	asm("wbinvd\n");
203fea25720SGraeme Russ }
204fea25720SGraeme Russ 
205fea25720SGraeme Russ void __attribute__ ((regparm(0))) generate_gpf(void);
206fea25720SGraeme Russ 
207fea25720SGraeme Russ /* segment 0x70 is an arbitrary segment which does not exist */
208fea25720SGraeme Russ asm(".globl generate_gpf\n"
209fea25720SGraeme Russ 	".hidden generate_gpf\n"
210fea25720SGraeme Russ 	".type generate_gpf, @function\n"
211fea25720SGraeme Russ 	"generate_gpf:\n"
212fea25720SGraeme Russ 	"ljmp   $0x70, $0x47114711\n");
213fea25720SGraeme Russ 
214fea25720SGraeme Russ void __reset_cpu(ulong addr)
215fea25720SGraeme Russ {
216fea25720SGraeme Russ 	printf("Resetting using x86 Triple Fault\n");
217fea25720SGraeme Russ 	set_vector(13, generate_gpf);	/* general protection fault handler */
218fea25720SGraeme Russ 	set_vector(8, generate_gpf);	/* double fault handler */
219fea25720SGraeme Russ 	generate_gpf();			/* start the show */
220fea25720SGraeme Russ }
221fea25720SGraeme Russ void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu")));
222095593c0SStefan Reinauer 
223095593c0SStefan Reinauer int dcache_status(void)
224095593c0SStefan Reinauer {
225095593c0SStefan Reinauer 	return !(read_cr0() & 0x40000000);
226095593c0SStefan Reinauer }
227095593c0SStefan Reinauer 
228095593c0SStefan Reinauer /* Define these functions to allow ehch-hcd to function */
229095593c0SStefan Reinauer void flush_dcache_range(unsigned long start, unsigned long stop)
230095593c0SStefan Reinauer {
231095593c0SStefan Reinauer }
232095593c0SStefan Reinauer 
233095593c0SStefan Reinauer void invalidate_dcache_range(unsigned long start, unsigned long stop)
234095593c0SStefan Reinauer {
235095593c0SStefan Reinauer }
23689371409SSimon Glass 
23789371409SSimon Glass void dcache_enable(void)
23889371409SSimon Glass {
23989371409SSimon Glass 	enable_caches();
24089371409SSimon Glass }
24189371409SSimon Glass 
24289371409SSimon Glass void dcache_disable(void)
24389371409SSimon Glass {
24489371409SSimon Glass 	disable_caches();
24589371409SSimon Glass }
24689371409SSimon Glass 
24789371409SSimon Glass void icache_enable(void)
24889371409SSimon Glass {
24989371409SSimon Glass }
25089371409SSimon Glass 
25189371409SSimon Glass void icache_disable(void)
25289371409SSimon Glass {
25389371409SSimon Glass }
25489371409SSimon Glass 
25589371409SSimon Glass int icache_status(void)
25689371409SSimon Glass {
25789371409SSimon Glass 	return 1;
25889371409SSimon Glass }
259