1*71a8f208SSimon Glass /*
2*71a8f208SSimon Glass * From coreboot src/soc/intel/broadwell/romstage/power_state.c
3*71a8f208SSimon Glass *
4*71a8f208SSimon Glass * Copyright (C) 2016 Google, Inc.
5*71a8f208SSimon Glass *
6*71a8f208SSimon Glass * SPDX-License-Identifier: GPL-2.0
7*71a8f208SSimon Glass */
8*71a8f208SSimon Glass
9*71a8f208SSimon Glass #include <common.h>
10*71a8f208SSimon Glass #include <pci.h>
11*71a8f208SSimon Glass #include <asm/io.h>
12*71a8f208SSimon Glass #include <asm/intel_regs.h>
13*71a8f208SSimon Glass #include <asm/arch/iomap.h>
14*71a8f208SSimon Glass #include <asm/arch/lpc.h>
15*71a8f208SSimon Glass #include <asm/arch/pch.h>
16*71a8f208SSimon Glass #include <asm/arch/pm.h>
17*71a8f208SSimon Glass
18*71a8f208SSimon Glass /* Return 0, 3, or 5 to indicate the previous sleep state. */
prev_sleep_state(struct chipset_power_state * ps)19*71a8f208SSimon Glass static int prev_sleep_state(struct chipset_power_state *ps)
20*71a8f208SSimon Glass {
21*71a8f208SSimon Glass /* Default to S0. */
22*71a8f208SSimon Glass int prev_sleep_state = SLEEP_STATE_S0;
23*71a8f208SSimon Glass
24*71a8f208SSimon Glass if (ps->pm1_sts & WAK_STS) {
25*71a8f208SSimon Glass switch ((ps->pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) {
26*71a8f208SSimon Glass #if CONFIG_HAVE_ACPI_RESUME
27*71a8f208SSimon Glass case SLP_TYP_S3:
28*71a8f208SSimon Glass prev_sleep_state = SLEEP_STATE_S3;
29*71a8f208SSimon Glass break;
30*71a8f208SSimon Glass #endif
31*71a8f208SSimon Glass case SLP_TYP_S5:
32*71a8f208SSimon Glass prev_sleep_state = SLEEP_STATE_S5;
33*71a8f208SSimon Glass break;
34*71a8f208SSimon Glass }
35*71a8f208SSimon Glass /* Clear SLP_TYP. */
36*71a8f208SSimon Glass outl(ps->pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT);
37*71a8f208SSimon Glass }
38*71a8f208SSimon Glass
39*71a8f208SSimon Glass if (ps->gen_pmcon3 & (PWR_FLR | SUS_PWR_FLR))
40*71a8f208SSimon Glass prev_sleep_state = SLEEP_STATE_S5;
41*71a8f208SSimon Glass
42*71a8f208SSimon Glass return prev_sleep_state;
43*71a8f208SSimon Glass }
44*71a8f208SSimon Glass
dump_power_state(struct chipset_power_state * ps)45*71a8f208SSimon Glass static void dump_power_state(struct chipset_power_state *ps)
46*71a8f208SSimon Glass {
47*71a8f208SSimon Glass debug("PM1_STS: %04x\n", ps->pm1_sts);
48*71a8f208SSimon Glass debug("PM1_EN: %04x\n", ps->pm1_en);
49*71a8f208SSimon Glass debug("PM1_CNT: %08x\n", ps->pm1_cnt);
50*71a8f208SSimon Glass debug("TCO_STS: %04x %04x\n", ps->tco1_sts, ps->tco2_sts);
51*71a8f208SSimon Glass
52*71a8f208SSimon Glass debug("GPE0_STS: %08x %08x %08x %08x\n",
53*71a8f208SSimon Glass ps->gpe0_sts[0], ps->gpe0_sts[1],
54*71a8f208SSimon Glass ps->gpe0_sts[2], ps->gpe0_sts[3]);
55*71a8f208SSimon Glass debug("GPE0_EN: %08x %08x %08x %08x\n",
56*71a8f208SSimon Glass ps->gpe0_en[0], ps->gpe0_en[1],
57*71a8f208SSimon Glass ps->gpe0_en[2], ps->gpe0_en[3]);
58*71a8f208SSimon Glass
59*71a8f208SSimon Glass debug("GEN_PMCON: %04x %04x %04x\n",
60*71a8f208SSimon Glass ps->gen_pmcon1, ps->gen_pmcon2, ps->gen_pmcon3);
61*71a8f208SSimon Glass
62*71a8f208SSimon Glass debug("Previous Sleep State: S%d\n",
63*71a8f208SSimon Glass ps->prev_sleep_state);
64*71a8f208SSimon Glass }
65*71a8f208SSimon Glass
66*71a8f208SSimon Glass /* Fill power state structure from ACPI PM registers */
power_state_get(struct udevice * pch_dev,struct chipset_power_state * ps)67*71a8f208SSimon Glass void power_state_get(struct udevice *pch_dev, struct chipset_power_state *ps)
68*71a8f208SSimon Glass {
69*71a8f208SSimon Glass ps->pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS);
70*71a8f208SSimon Glass ps->pm1_en = inw(ACPI_BASE_ADDRESS + PM1_EN);
71*71a8f208SSimon Glass ps->pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);
72*71a8f208SSimon Glass ps->tco1_sts = inw(ACPI_BASE_ADDRESS + TCO1_STS);
73*71a8f208SSimon Glass ps->tco2_sts = inw(ACPI_BASE_ADDRESS + TCO2_STS);
74*71a8f208SSimon Glass ps->gpe0_sts[0] = inl(ACPI_BASE_ADDRESS + GPE0_STS(0));
75*71a8f208SSimon Glass ps->gpe0_sts[1] = inl(ACPI_BASE_ADDRESS + GPE0_STS(1));
76*71a8f208SSimon Glass ps->gpe0_sts[2] = inl(ACPI_BASE_ADDRESS + GPE0_STS(2));
77*71a8f208SSimon Glass ps->gpe0_sts[3] = inl(ACPI_BASE_ADDRESS + GPE0_STS(3));
78*71a8f208SSimon Glass ps->gpe0_en[0] = inl(ACPI_BASE_ADDRESS + GPE0_EN(0));
79*71a8f208SSimon Glass ps->gpe0_en[1] = inl(ACPI_BASE_ADDRESS + GPE0_EN(1));
80*71a8f208SSimon Glass ps->gpe0_en[2] = inl(ACPI_BASE_ADDRESS + GPE0_EN(2));
81*71a8f208SSimon Glass ps->gpe0_en[3] = inl(ACPI_BASE_ADDRESS + GPE0_EN(3));
82*71a8f208SSimon Glass
83*71a8f208SSimon Glass dm_pci_read_config16(pch_dev, GEN_PMCON_1, &ps->gen_pmcon1);
84*71a8f208SSimon Glass dm_pci_read_config16(pch_dev, GEN_PMCON_2, &ps->gen_pmcon2);
85*71a8f208SSimon Glass dm_pci_read_config16(pch_dev, GEN_PMCON_3, &ps->gen_pmcon3);
86*71a8f208SSimon Glass
87*71a8f208SSimon Glass ps->prev_sleep_state = prev_sleep_state(ps);
88*71a8f208SSimon Glass
89*71a8f208SSimon Glass dump_power_state(ps);
90*71a8f208SSimon Glass }
91