1*b697b848SSimon Glass /*
2*b697b848SSimon Glass * Copyright (c) 2016 Google, Inc
3*b697b848SSimon Glass *
4*b697b848SSimon Glass * SPDX-License-Identifier: GPL-2.0
5*b697b848SSimon Glass *
6*b697b848SSimon Glass * Based on code from coreboot src/soc/intel/broadwell/me_status.c
7*b697b848SSimon Glass */
8*b697b848SSimon Glass
9*b697b848SSimon Glass #include <common.h>
10*b697b848SSimon Glass #include <errno.h>
11*b697b848SSimon Glass #include <asm/arch/me.h>
12*b697b848SSimon Glass
me_read_dword_ptr(struct udevice * dev,void * ptr,int offset)13*b697b848SSimon Glass static inline void me_read_dword_ptr(struct udevice *dev, void *ptr, int offset)
14*b697b848SSimon Glass {
15*b697b848SSimon Glass u32 dword;
16*b697b848SSimon Glass
17*b697b848SSimon Glass dm_pci_read_config32(dev, offset, &dword);
18*b697b848SSimon Glass memcpy(ptr, &dword, sizeof(dword));
19*b697b848SSimon Glass }
20*b697b848SSimon Glass
intel_me_hsio_version(struct udevice * dev,uint16_t * versionp,uint16_t * checksump)21*b697b848SSimon Glass int intel_me_hsio_version(struct udevice *dev, uint16_t *versionp,
22*b697b848SSimon Glass uint16_t *checksump)
23*b697b848SSimon Glass {
24*b697b848SSimon Glass int count;
25*b697b848SSimon Glass u32 hsiover;
26*b697b848SSimon Glass struct me_hfs hfs;
27*b697b848SSimon Glass
28*b697b848SSimon Glass /* Query for HSIO version, overloads H_GS and HFS */
29*b697b848SSimon Glass dm_pci_write_config32(dev, PCI_ME_H_GS,
30*b697b848SSimon Glass ME_HSIO_MESSAGE | ME_HSIO_CMD_GETHSIOVER);
31*b697b848SSimon Glass
32*b697b848SSimon Glass /* Must wait for ME acknowledgement */
33*b697b848SSimon Glass for (count = ME_RETRY; count > 0; --count) {
34*b697b848SSimon Glass me_read_dword_ptr(dev, &hfs, PCI_ME_HFS);
35*b697b848SSimon Glass if (hfs.bios_msg_ack)
36*b697b848SSimon Glass break;
37*b697b848SSimon Glass udelay(ME_DELAY);
38*b697b848SSimon Glass }
39*b697b848SSimon Glass if (!count) {
40*b697b848SSimon Glass debug("ERROR: ME failed to respond\n");
41*b697b848SSimon Glass return -ETIMEDOUT;
42*b697b848SSimon Glass }
43*b697b848SSimon Glass
44*b697b848SSimon Glass /* HSIO version should be in HFS_5 */
45*b697b848SSimon Glass dm_pci_read_config32(dev, PCI_ME_HFS5, &hsiover);
46*b697b848SSimon Glass *versionp = hsiover >> 16;
47*b697b848SSimon Glass *checksump = hsiover & 0xffff;
48*b697b848SSimon Glass
49*b697b848SSimon Glass debug("ME: HSIO Version : %d (CRC 0x%04x)\n",
50*b697b848SSimon Glass *versionp, *checksump);
51*b697b848SSimon Glass
52*b697b848SSimon Glass /* Reset registers to normal behavior */
53*b697b848SSimon Glass dm_pci_write_config32(dev, PCI_ME_H_GS,
54*b697b848SSimon Glass ME_HSIO_MESSAGE | ME_HSIO_CMD_GETHSIOVER);
55*b697b848SSimon Glass
56*b697b848SSimon Glass return 0;
57*b697b848SSimon Glass }
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