xref: /rk3399_rockchip-uboot/arch/x86/Kconfig (revision 8cb20ccc34cda9fdcbae962744bf8ecee90dd5d2)
1menu "x86 architecture"
2	depends on X86
3
4config SYS_ARCH
5	default "x86"
6
7config USE_PRIVATE_LIBGCC
8	default y
9
10choice
11	prompt "Target select"
12
13config TARGET_COREBOOT
14	bool "Support coreboot"
15	help
16	  This target is used for running U-Boot on top of Coreboot. In
17	  this case Coreboot does the early inititalisation, and U-Boot
18	  takes over once the RAM, video and CPU are fully running.
19	  U-Boot is loaded as a fallback payload from Coreboot, in
20	  Coreboot terminology. This method was used for the Chromebook
21	  Pixel when launched.
22
23config TARGET_CHROMEBOOK_LINK
24	bool "Support Chromebook link"
25	help
26	  This is the Chromebook Pixel released in 2013. It uses an Intel
27	  i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
28	  SDRAM. It has a Panther Point platform controller hub, PCIe
29	  WiFi and Bluetooth. It also includes a 720p webcam, USB SD
30	  reader, microphone and speakers, display port and 32GB SATA
31	  solid state drive. There is a Chrome OS EC connected on LPC,
32	  and it provides a 2560x1700 high resolution touch-enabled LCD
33	  display.
34
35config TARGET_CROWNBAY
36	bool "Support Intel Crown Bay CRB"
37	help
38	  This is the Intel Crown Bay Customer Reference Board. It contains
39	  the Intel Atom Processor E6xx populated on the COM Express module
40	  with 1GB DDR2 soldered down memory and a carrier board with the
41	  Intel Platform Controller Hub EG20T, other system components and
42	  peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS.
43
44endchoice
45
46config RAMBASE
47	hex
48	default 0x100000
49
50config XIP_ROM_SIZE
51	hex
52	default ROM_SIZE
53
54config CPU_ADDR_BITS
55	int
56	default 36
57
58config HPET_ADDRESS
59	hex
60	default 0xfed00000 if !HPET_ADDRESS_OVERRIDE
61
62config SMM_TSEG
63	bool
64	default n
65
66config SMM_TSEG_SIZE
67	hex
68
69config X86_RESET_VECTOR
70	bool
71	default n
72
73config SYS_X86_START16
74	hex
75	depends on X86_RESET_VECTOR
76	default 0xfffff800
77
78config BOARD_ROMSIZE_KB_512
79	bool
80config BOARD_ROMSIZE_KB_1024
81	bool
82config BOARD_ROMSIZE_KB_2048
83	bool
84config BOARD_ROMSIZE_KB_4096
85	bool
86config BOARD_ROMSIZE_KB_8192
87	bool
88config BOARD_ROMSIZE_KB_16384
89	bool
90
91choice
92	prompt "ROM chip size"
93	default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512
94	default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024
95	default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048
96	default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096
97	default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192
98	default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384
99	help
100	  Select the size of the ROM chip you intend to flash U-Boot on.
101
102	  The build system will take care of creating a u-boot.rom file
103	  of the matching size.
104
105config UBOOT_ROMSIZE_KB_512
106	bool "512 KB"
107	help
108	  Choose this option if you have a 512 KB ROM chip.
109
110config UBOOT_ROMSIZE_KB_1024
111	bool "1024 KB (1 MB)"
112	help
113	  Choose this option if you have a 1024 KB (1 MB) ROM chip.
114
115config UBOOT_ROMSIZE_KB_2048
116	bool "2048 KB (2 MB)"
117	help
118	  Choose this option if you have a 2048 KB (2 MB) ROM chip.
119
120config UBOOT_ROMSIZE_KB_4096
121	bool "4096 KB (4 MB)"
122	help
123	  Choose this option if you have a 4096 KB (4 MB) ROM chip.
124
125config UBOOT_ROMSIZE_KB_8192
126	bool "8192 KB (8 MB)"
127	help
128	  Choose this option if you have a 8192 KB (8 MB) ROM chip.
129
130config UBOOT_ROMSIZE_KB_16384
131	bool "16384 KB (16 MB)"
132	help
133	  Choose this option if you have a 16384 KB (16 MB) ROM chip.
134
135endchoice
136
137# Map the config names to an integer (KB).
138config UBOOT_ROMSIZE_KB
139	int
140	default 512 if UBOOT_ROMSIZE_KB_512
141	default 1024 if UBOOT_ROMSIZE_KB_1024
142	default 2048 if UBOOT_ROMSIZE_KB_2048
143	default 4096 if UBOOT_ROMSIZE_KB_4096
144	default 8192 if UBOOT_ROMSIZE_KB_8192
145	default 16384 if UBOOT_ROMSIZE_KB_16384
146
147# Map the config names to a hex value (bytes).
148config ROM_SIZE
149	hex
150	default 0x80000 if UBOOT_ROMSIZE_KB_512
151	default 0x100000 if UBOOT_ROMSIZE_KB_1024
152	default 0x200000 if UBOOT_ROMSIZE_KB_2048
153	default 0x400000 if UBOOT_ROMSIZE_KB_4096
154	default 0x800000 if UBOOT_ROMSIZE_KB_8192
155	default 0xc00000 if UBOOT_ROMSIZE_KB_12288
156	default 0x1000000 if UBOOT_ROMSIZE_KB_16384
157
158config HAVE_INTEL_ME
159	bool "Platform requires Intel Management Engine"
160	help
161	  Newer higher-end devices have an Intel Management Engine (ME)
162	  which is a very large binary blob (typically 1.5MB) which is
163	  required for the platform to work. This enforces a particular
164	  SPI flash format. You will need to supply the me.bin file in
165	  your board directory.
166
167config X86_RAMTEST
168	bool "Perform a simple RAM test after SDRAM initialisation"
169	help
170	  If there is something wrong with SDRAM then the platform will
171	  often crash within U-Boot or the kernel. This option enables a
172	  very simple RAM test that quickly checks whether the SDRAM seems
173	  to work correctly. It is not exhaustive but can save time by
174	  detecting obvious failures.
175
176config MARK_GRAPHICS_MEM_WRCOMB
177	bool "Mark graphics memory as write-combining."
178	default n
179	help
180	 The graphics performance may increase if the graphics
181	 memory is set as write-combining cache type. This option
182	 enables marking the graphics memory as write-combining.
183
184menu "Display"
185
186config FRAMEBUFFER_SET_VESA_MODE
187	prompt "Set framebuffer graphics resolution"
188	bool
189	help
190	  Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console)
191
192choice
193	prompt "framebuffer graphics resolution"
194	default FRAMEBUFFER_VESA_MODE_117
195	depends on FRAMEBUFFER_SET_VESA_MODE
196	help
197	  This option sets the resolution used for the coreboot framebuffer (and
198	  bootsplash screen).
199
200config FRAMEBUFFER_VESA_MODE_100
201	bool "640x400 256-color"
202
203config FRAMEBUFFER_VESA_MODE_101
204	bool "640x480 256-color"
205
206config FRAMEBUFFER_VESA_MODE_102
207	bool "800x600 16-color"
208
209config FRAMEBUFFER_VESA_MODE_103
210	bool "800x600 256-color"
211
212config FRAMEBUFFER_VESA_MODE_104
213	bool "1024x768 16-color"
214
215config FRAMEBUFFER_VESA_MODE_105
216	bool "1024x7686 256-color"
217
218config FRAMEBUFFER_VESA_MODE_106
219	bool "1280x1024 16-color"
220
221config FRAMEBUFFER_VESA_MODE_107
222	bool "1280x1024 256-color"
223
224config FRAMEBUFFER_VESA_MODE_108
225	bool "80x60 text"
226
227config FRAMEBUFFER_VESA_MODE_109
228	bool "132x25 text"
229
230config FRAMEBUFFER_VESA_MODE_10A
231	bool "132x43 text"
232
233config FRAMEBUFFER_VESA_MODE_10B
234	bool "132x50 text"
235
236config FRAMEBUFFER_VESA_MODE_10C
237	bool "132x60 text"
238
239config FRAMEBUFFER_VESA_MODE_10D
240	bool "320x200 32k-color (1:5:5:5)"
241
242config FRAMEBUFFER_VESA_MODE_10E
243	bool "320x200 64k-color (5:6:5)"
244
245config FRAMEBUFFER_VESA_MODE_10F
246	bool "320x200 16.8M-color (8:8:8)"
247
248config FRAMEBUFFER_VESA_MODE_110
249	bool "640x480 32k-color (1:5:5:5)"
250
251config FRAMEBUFFER_VESA_MODE_111
252	bool "640x480 64k-color (5:6:5)"
253
254config FRAMEBUFFER_VESA_MODE_112
255	bool "640x480 16.8M-color (8:8:8)"
256
257config FRAMEBUFFER_VESA_MODE_113
258	bool "800x600 32k-color (1:5:5:5)"
259
260config FRAMEBUFFER_VESA_MODE_114
261	bool "800x600 64k-color (5:6:5)"
262
263config FRAMEBUFFER_VESA_MODE_115
264	bool "800x600 16.8M-color (8:8:8)"
265
266config FRAMEBUFFER_VESA_MODE_116
267	bool "1024x768 32k-color (1:5:5:5)"
268
269config FRAMEBUFFER_VESA_MODE_117
270	bool "1024x768 64k-color (5:6:5)"
271
272config FRAMEBUFFER_VESA_MODE_118
273	bool "1024x768 16.8M-color (8:8:8)"
274
275config FRAMEBUFFER_VESA_MODE_119
276	bool "1280x1024 32k-color (1:5:5:5)"
277
278config FRAMEBUFFER_VESA_MODE_11A
279	bool "1280x1024 64k-color (5:6:5)"
280
281config FRAMEBUFFER_VESA_MODE_11B
282	bool "1280x1024 16.8M-color (8:8:8)"
283
284config FRAMEBUFFER_VESA_MODE_USER
285	bool "Manually select VESA mode"
286
287endchoice
288
289# Map the config names to an integer (KB).
290config FRAMEBUFFER_VESA_MODE
291	prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER
292	hex
293	default 0x100 if FRAMEBUFFER_VESA_MODE_100
294	default 0x101 if FRAMEBUFFER_VESA_MODE_101
295	default 0x102 if FRAMEBUFFER_VESA_MODE_102
296	default 0x103 if FRAMEBUFFER_VESA_MODE_103
297	default 0x104 if FRAMEBUFFER_VESA_MODE_104
298	default 0x105 if FRAMEBUFFER_VESA_MODE_105
299	default 0x106 if FRAMEBUFFER_VESA_MODE_106
300	default 0x107 if FRAMEBUFFER_VESA_MODE_107
301	default 0x108 if FRAMEBUFFER_VESA_MODE_108
302	default 0x109 if FRAMEBUFFER_VESA_MODE_109
303	default 0x10A if FRAMEBUFFER_VESA_MODE_10A
304	default 0x10B if FRAMEBUFFER_VESA_MODE_10B
305	default 0x10C if FRAMEBUFFER_VESA_MODE_10C
306	default 0x10D if FRAMEBUFFER_VESA_MODE_10D
307	default 0x10E if FRAMEBUFFER_VESA_MODE_10E
308	default 0x10F if FRAMEBUFFER_VESA_MODE_10F
309	default 0x110 if FRAMEBUFFER_VESA_MODE_110
310	default 0x111 if FRAMEBUFFER_VESA_MODE_111
311	default 0x112 if FRAMEBUFFER_VESA_MODE_112
312	default 0x113 if FRAMEBUFFER_VESA_MODE_113
313	default 0x114 if FRAMEBUFFER_VESA_MODE_114
314	default 0x115 if FRAMEBUFFER_VESA_MODE_115
315	default 0x116 if FRAMEBUFFER_VESA_MODE_116
316	default 0x117 if FRAMEBUFFER_VESA_MODE_117
317	default 0x118 if FRAMEBUFFER_VESA_MODE_118
318	default 0x119 if FRAMEBUFFER_VESA_MODE_119
319	default 0x11A if FRAMEBUFFER_VESA_MODE_11A
320	default 0x11B if FRAMEBUFFER_VESA_MODE_11B
321	default 0x117 if FRAMEBUFFER_VESA_MODE_USER
322
323endmenu
324
325config TSC_CALIBRATION_BYPASS
326	bool "Bypass Time-Stamp Counter (TSC) calibration"
327	default n
328	help
329	  By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
330	  running frequency via Model-Specific Register (MSR) and Programmable
331	  Interval Timer (PIT). If the calibration does not work on your board,
332	  select this option and provide a hardcoded TSC running frequency with
333	  CONFIG_TSC_FREQ_IN_MHZ below.
334
335	  Normally this option should be turned on in a simulation environment
336	  like qemu.
337
338config TSC_FREQ_IN_MHZ
339	int "Time-Stamp Counter (TSC) running frequency in MHz"
340	depends on TSC_CALIBRATION_BYPASS
341	default 1000
342	help
343	  The running frequency in MHz of Time-Stamp Counter (TSC).
344
345source "arch/x86/cpu/ivybridge/Kconfig"
346
347source "arch/x86/cpu/queensbay/Kconfig"
348
349source "board/coreboot/coreboot/Kconfig"
350
351source "board/google/chromebook_link/Kconfig"
352
353source "board/intel/crownbay/Kconfig"
354
355endmenu
356