1dd84058dSMasahiro Yamadamenu "x86 architecture" 2dd84058dSMasahiro Yamada depends on X86 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "x86" 6dd84058dSMasahiro Yamada 7dd84058dSMasahiro Yamadachoice 8a66ad67fSSimon Glass prompt "Run U-Boot in 32/64-bit mode" 9a66ad67fSSimon Glass default X86_RUN_32BIT 10a66ad67fSSimon Glass help 11a66ad67fSSimon Glass U-Boot can be built as a 32-bit binary which runs in 32-bit mode 12a66ad67fSSimon Glass even on 64-bit machines. In this case SPL is not used, and U-Boot 13a66ad67fSSimon Glass runs directly from the reset vector (via 16-bit start-up). 14a66ad67fSSimon Glass 15a66ad67fSSimon Glass Alternatively it can be run as a 64-bit binary, thus requiring a 16a66ad67fSSimon Glass 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit 17a66ad67fSSimon Glass start-up) then jumps to U-Boot in 64-bit mode. 18a66ad67fSSimon Glass 19a66ad67fSSimon Glass For now, 32-bit mode is recommended, as 64-bit is still 20a66ad67fSSimon Glass experimental and is missing a lot of features. 21a66ad67fSSimon Glass 22a66ad67fSSimon Glassconfig X86_RUN_32BIT 23a66ad67fSSimon Glass bool "32-bit" 24a66ad67fSSimon Glass help 25a66ad67fSSimon Glass Build U-Boot as a 32-bit binary with no SPL. This is the currently 26a66ad67fSSimon Glass supported normal setup. U-Boot will stay in 32-bit mode even on 27a66ad67fSSimon Glass 64-bit machines. When booting a 64-bit kernel, U-Boot will switch 28a66ad67fSSimon Glass to 64-bit just before starting the kernel. Only the bottom 4GB of 29a66ad67fSSimon Glass memory can be accessed through normal means, although 30a66ad67fSSimon Glass arch_phys_memset() can be used for basic access to other memory. 31a66ad67fSSimon Glass 32a66ad67fSSimon Glassconfig X86_RUN_64BIT 33a66ad67fSSimon Glass bool "64-bit" 34a66ad67fSSimon Glass select X86_64 35a66ad67fSSimon Glass select SUPPORT_SPL 36a66ad67fSSimon Glass select SPL 37a66ad67fSSimon Glass select SPL_SEPARATE_BSS 38a66ad67fSSimon Glass help 39a66ad67fSSimon Glass Build U-Boot as a 64-bit binary with a 32-bit SPL. This is 40a66ad67fSSimon Glass experimental and many features are missing. U-Boot SPL starts up, 41a66ad67fSSimon Glass runs through the 16-bit and 32-bit init, then switches to 64-bit 42a66ad67fSSimon Glass mode and jumps to U-Boot proper. 43a66ad67fSSimon Glass 44a66ad67fSSimon Glassendchoice 45a66ad67fSSimon Glass 46a66ad67fSSimon Glassconfig X86_64 47a66ad67fSSimon Glass bool 48a66ad67fSSimon Glass 49a66ad67fSSimon Glassconfig SPL_X86_64 50a66ad67fSSimon Glass bool 51a66ad67fSSimon Glass depends on SPL 52a66ad67fSSimon Glass 53a66ad67fSSimon Glasschoice 5465c4ac0aSBin Meng prompt "Mainboard vendor" 5599a309f3SBin Meng default VENDOR_EMULATION 56dd84058dSMasahiro Yamada 57215099a5SGeorge McCollisterconfig VENDOR_ADVANTECH 58215099a5SGeorge McCollister bool "advantech" 59215099a5SGeorge McCollister 6082ceba2cSStefan Roeseconfig VENDOR_CONGATEC 6182ceba2cSStefan Roese bool "congatec" 6282ceba2cSStefan Roese 6365c4ac0aSBin Mengconfig VENDOR_COREBOOT 6465c4ac0aSBin Meng bool "coreboot" 658ef07571SSimon Glass 66b1ad6c69SStefan Roeseconfig VENDOR_DFI 67b1ad6c69SStefan Roese bool "dfi" 68b1ad6c69SStefan Roese 693dcdd17bSBen Stoltzconfig VENDOR_EFI 703dcdd17bSBen Stoltz bool "efi" 713dcdd17bSBen Stoltz 72a65b25d1SBin Mengconfig VENDOR_EMULATION 73a65b25d1SBin Meng bool "emulation" 74a65b25d1SBin Meng 7565c4ac0aSBin Mengconfig VENDOR_GOOGLE 7665c4ac0aSBin Meng bool "Google" 77dd84058dSMasahiro Yamada 7865c4ac0aSBin Mengconfig VENDOR_INTEL 7965c4ac0aSBin Meng bool "Intel" 80ef46bea0SBin Meng 81dd84058dSMasahiro Yamadaendchoice 82dd84058dSMasahiro Yamada 8365c4ac0aSBin Meng# board-specific options below 84215099a5SGeorge McCollistersource "board/advantech/Kconfig" 8582ceba2cSStefan Roesesource "board/congatec/Kconfig" 8665c4ac0aSBin Mengsource "board/coreboot/Kconfig" 87b1ad6c69SStefan Roesesource "board/dfi/Kconfig" 883e9aa320SBen Stoltzsource "board/efi/Kconfig" 89a65b25d1SBin Mengsource "board/emulation/Kconfig" 9065c4ac0aSBin Mengsource "board/google/Kconfig" 9165c4ac0aSBin Mengsource "board/intel/Kconfig" 9265c4ac0aSBin Meng 93029194a3SBin Meng# platform-specific options below 94029194a3SBin Mengsource "arch/x86/cpu/baytrail/Kconfig" 952f3f477bSSimon Glasssource "arch/x86/cpu/broadwell/Kconfig" 96029194a3SBin Mengsource "arch/x86/cpu/coreboot/Kconfig" 97029194a3SBin Mengsource "arch/x86/cpu/ivybridge/Kconfig" 98a65b25d1SBin Mengsource "arch/x86/cpu/qemu/Kconfig" 99029194a3SBin Mengsource "arch/x86/cpu/quark/Kconfig" 100029194a3SBin Mengsource "arch/x86/cpu/queensbay/Kconfig" 101029194a3SBin Meng 102029194a3SBin Meng# architecture-specific options below 103029194a3SBin Meng 104a219639dSSimon Glassconfig AHCI 105a219639dSSimon Glass default y 106a219639dSSimon Glass 107b724bd7dSSimon Glassconfig SYS_MALLOC_F_LEN 108b724bd7dSSimon Glass default 0x800 109b724bd7dSSimon Glass 11070a09c6cSSimon Glassconfig RAMBASE 11170a09c6cSSimon Glass hex 11270a09c6cSSimon Glass default 0x100000 11370a09c6cSSimon Glass 11470a09c6cSSimon Glassconfig XIP_ROM_SIZE 11570a09c6cSSimon Glass hex 1167698d36aSBin Meng depends on X86_RESET_VECTOR 117bbd43d65SSimon Glass default ROM_SIZE 11870a09c6cSSimon Glass 11970a09c6cSSimon Glassconfig CPU_ADDR_BITS 12070a09c6cSSimon Glass int 12170a09c6cSSimon Glass default 36 12270a09c6cSSimon Glass 12365dd74a6SSimon Glassconfig HPET_ADDRESS 12465dd74a6SSimon Glass hex 12565dd74a6SSimon Glass default 0xfed00000 if !HPET_ADDRESS_OVERRIDE 12665dd74a6SSimon Glass 12765dd74a6SSimon Glassconfig SMM_TSEG 12865dd74a6SSimon Glass bool 12965dd74a6SSimon Glass default n 13065dd74a6SSimon Glass 13165dd74a6SSimon Glassconfig SMM_TSEG_SIZE 13265dd74a6SSimon Glass hex 13365dd74a6SSimon Glass 1348cb20cccSBin Mengconfig X86_RESET_VECTOR 1358cb20cccSBin Meng bool 1368cb20cccSBin Meng default n 1378cb20cccSBin Meng 13813f1dc64SSimon Glass# The following options control where the 16-bit and 32-bit init lies 13913f1dc64SSimon Glass# If SPL is enabled then it normally holds this init code, and U-Boot proper 14013f1dc64SSimon Glass# is normally a 64-bit build. 14113f1dc64SSimon Glass# 14213f1dc64SSimon Glass# The 16-bit init refers to the reset vector and the small amount of code to 14313f1dc64SSimon Glass# get the processor into 32-bit mode. It may be in SPL or in U-Boot proper, 14413f1dc64SSimon Glass# or missing altogether if U-Boot is started from EFI or coreboot. 14513f1dc64SSimon Glass# 14613f1dc64SSimon Glass# The 32-bit init refers to processor init, running binary blobs including 14713f1dc64SSimon Glass# FSP, setting up interrupts and anything else that needs to be done in 14813f1dc64SSimon Glass# 32-bit code. It is normally in the same place as 16-bit init if that is 14913f1dc64SSimon Glass# enabled (i.e. they are both in SPL, or both in U-Boot proper). 15013f1dc64SSimon Glassconfig X86_16BIT_INIT 15113f1dc64SSimon Glass bool 15213f1dc64SSimon Glass depends on X86_RESET_VECTOR 15313f1dc64SSimon Glass default y if X86_RESET_VECTOR && !SPL 15413f1dc64SSimon Glass help 15513f1dc64SSimon Glass This is enabled when 16-bit init is in U-Boot proper 15613f1dc64SSimon Glass 15713f1dc64SSimon Glassconfig SPL_X86_16BIT_INIT 15813f1dc64SSimon Glass bool 15913f1dc64SSimon Glass depends on X86_RESET_VECTOR 16013f1dc64SSimon Glass default y if X86_RESET_VECTOR && SPL 16113f1dc64SSimon Glass help 16213f1dc64SSimon Glass This is enabled when 16-bit init is in SPL 16313f1dc64SSimon Glass 16413f1dc64SSimon Glassconfig X86_32BIT_INIT 16513f1dc64SSimon Glass bool 16613f1dc64SSimon Glass depends on X86_RESET_VECTOR 16713f1dc64SSimon Glass default y if X86_RESET_VECTOR && !SPL 16813f1dc64SSimon Glass help 16913f1dc64SSimon Glass This is enabled when 32-bit init is in U-Boot proper 17013f1dc64SSimon Glass 17113f1dc64SSimon Glassconfig SPL_X86_32BIT_INIT 17213f1dc64SSimon Glass bool 17313f1dc64SSimon Glass depends on X86_RESET_VECTOR 17413f1dc64SSimon Glass default y if X86_RESET_VECTOR && SPL 17513f1dc64SSimon Glass help 17613f1dc64SSimon Glass This is enabled when 32-bit init is in SPL 17713f1dc64SSimon Glass 178343fb990SBin Mengconfig RESET_SEG_START 179343fb990SBin Meng hex 180343fb990SBin Meng depends on X86_RESET_VECTOR 181343fb990SBin Meng default 0xffff0000 182343fb990SBin Meng 183343fb990SBin Mengconfig RESET_SEG_SIZE 184343fb990SBin Meng hex 185343fb990SBin Meng depends on X86_RESET_VECTOR 186343fb990SBin Meng default 0x10000 187343fb990SBin Meng 188343fb990SBin Mengconfig RESET_VEC_LOC 189343fb990SBin Meng hex 190343fb990SBin Meng depends on X86_RESET_VECTOR 191343fb990SBin Meng default 0xfffffff0 192343fb990SBin Meng 1938cb20cccSBin Mengconfig SYS_X86_START16 1948cb20cccSBin Meng hex 1958cb20cccSBin Meng depends on X86_RESET_VECTOR 1968cb20cccSBin Meng default 0xfffff800 1978cb20cccSBin Meng 198*446d4e04SAndy Shevchenkoconfig X86_LOAD_FROM_32_BIT 199*446d4e04SAndy Shevchenko bool "Boot from a 32-bit program" 200*446d4e04SAndy Shevchenko help 201*446d4e04SAndy Shevchenko Define this to boot U-Boot from a 32-bit program which sets 202*446d4e04SAndy Shevchenko the GDT differently. This can be used to boot directly from 203*446d4e04SAndy Shevchenko any stage of coreboot, for example, bypassing the normal 204*446d4e04SAndy Shevchenko payload-loading feature. 205*446d4e04SAndy Shevchenko 20664542f46SBin Mengconfig BOARD_ROMSIZE_KB_512 20764542f46SBin Meng bool 20864542f46SBin Mengconfig BOARD_ROMSIZE_KB_1024 20964542f46SBin Meng bool 21064542f46SBin Mengconfig BOARD_ROMSIZE_KB_2048 21164542f46SBin Meng bool 21264542f46SBin Mengconfig BOARD_ROMSIZE_KB_4096 21364542f46SBin Meng bool 21464542f46SBin Mengconfig BOARD_ROMSIZE_KB_8192 21564542f46SBin Meng bool 21664542f46SBin Mengconfig BOARD_ROMSIZE_KB_16384 21764542f46SBin Meng bool 21864542f46SBin Meng 21964542f46SBin Mengchoice 22064542f46SBin Meng prompt "ROM chip size" 2217698d36aSBin Meng depends on X86_RESET_VECTOR 22264542f46SBin Meng default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512 22364542f46SBin Meng default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024 22464542f46SBin Meng default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048 22564542f46SBin Meng default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096 22664542f46SBin Meng default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192 22764542f46SBin Meng default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384 22864542f46SBin Meng help 22964542f46SBin Meng Select the size of the ROM chip you intend to flash U-Boot on. 23064542f46SBin Meng 23164542f46SBin Meng The build system will take care of creating a u-boot.rom file 23264542f46SBin Meng of the matching size. 23364542f46SBin Meng 23464542f46SBin Mengconfig UBOOT_ROMSIZE_KB_512 23564542f46SBin Meng bool "512 KB" 23664542f46SBin Meng help 23764542f46SBin Meng Choose this option if you have a 512 KB ROM chip. 23864542f46SBin Meng 23964542f46SBin Mengconfig UBOOT_ROMSIZE_KB_1024 24064542f46SBin Meng bool "1024 KB (1 MB)" 24164542f46SBin Meng help 24264542f46SBin Meng Choose this option if you have a 1024 KB (1 MB) ROM chip. 24364542f46SBin Meng 24464542f46SBin Mengconfig UBOOT_ROMSIZE_KB_2048 24564542f46SBin Meng bool "2048 KB (2 MB)" 24664542f46SBin Meng help 24764542f46SBin Meng Choose this option if you have a 2048 KB (2 MB) ROM chip. 24864542f46SBin Meng 24964542f46SBin Mengconfig UBOOT_ROMSIZE_KB_4096 25064542f46SBin Meng bool "4096 KB (4 MB)" 25164542f46SBin Meng help 25264542f46SBin Meng Choose this option if you have a 4096 KB (4 MB) ROM chip. 25364542f46SBin Meng 25464542f46SBin Mengconfig UBOOT_ROMSIZE_KB_8192 25564542f46SBin Meng bool "8192 KB (8 MB)" 25664542f46SBin Meng help 25764542f46SBin Meng Choose this option if you have a 8192 KB (8 MB) ROM chip. 25864542f46SBin Meng 25964542f46SBin Mengconfig UBOOT_ROMSIZE_KB_16384 26064542f46SBin Meng bool "16384 KB (16 MB)" 26164542f46SBin Meng help 26264542f46SBin Meng Choose this option if you have a 16384 KB (16 MB) ROM chip. 26364542f46SBin Meng 26464542f46SBin Mengendchoice 26564542f46SBin Meng 26664542f46SBin Meng# Map the config names to an integer (KB). 26764542f46SBin Mengconfig UBOOT_ROMSIZE_KB 26864542f46SBin Meng int 26964542f46SBin Meng default 512 if UBOOT_ROMSIZE_KB_512 27064542f46SBin Meng default 1024 if UBOOT_ROMSIZE_KB_1024 27164542f46SBin Meng default 2048 if UBOOT_ROMSIZE_KB_2048 27264542f46SBin Meng default 4096 if UBOOT_ROMSIZE_KB_4096 27364542f46SBin Meng default 8192 if UBOOT_ROMSIZE_KB_8192 27464542f46SBin Meng default 16384 if UBOOT_ROMSIZE_KB_16384 27564542f46SBin Meng 27664542f46SBin Meng# Map the config names to a hex value (bytes). 277fce7b276SSimon Glassconfig ROM_SIZE 278fce7b276SSimon Glass hex 27964542f46SBin Meng default 0x80000 if UBOOT_ROMSIZE_KB_512 28064542f46SBin Meng default 0x100000 if UBOOT_ROMSIZE_KB_1024 28164542f46SBin Meng default 0x200000 if UBOOT_ROMSIZE_KB_2048 28264542f46SBin Meng default 0x400000 if UBOOT_ROMSIZE_KB_4096 28364542f46SBin Meng default 0x800000 if UBOOT_ROMSIZE_KB_8192 28464542f46SBin Meng default 0xc00000 if UBOOT_ROMSIZE_KB_12288 28564542f46SBin Meng default 0x1000000 if UBOOT_ROMSIZE_KB_16384 286fce7b276SSimon Glass 287fce7b276SSimon Glassconfig HAVE_INTEL_ME 288fce7b276SSimon Glass bool "Platform requires Intel Management Engine" 289fce7b276SSimon Glass help 290fce7b276SSimon Glass Newer higher-end devices have an Intel Management Engine (ME) 291fce7b276SSimon Glass which is a very large binary blob (typically 1.5MB) which is 292fce7b276SSimon Glass required for the platform to work. This enforces a particular 293fce7b276SSimon Glass SPI flash format. You will need to supply the me.bin file in 294fce7b276SSimon Glass your board directory. 295fce7b276SSimon Glass 29665dd74a6SSimon Glassconfig X86_RAMTEST 29765dd74a6SSimon Glass bool "Perform a simple RAM test after SDRAM initialisation" 29865dd74a6SSimon Glass help 29965dd74a6SSimon Glass If there is something wrong with SDRAM then the platform will 30065dd74a6SSimon Glass often crash within U-Boot or the kernel. This option enables a 30165dd74a6SSimon Glass very simple RAM test that quickly checks whether the SDRAM seems 30265dd74a6SSimon Glass to work correctly. It is not exhaustive but can save time by 30365dd74a6SSimon Glass detecting obvious failures. 30465dd74a6SSimon Glass 3058ce24cd9SSimon Glassconfig HAVE_FSP 3068ce24cd9SSimon Glass bool "Add an Firmware Support Package binary" 307e49cceacSSimon Glass depends on !EFI 3088ce24cd9SSimon Glass help 3098ce24cd9SSimon Glass Select this option to add an Firmware Support Package binary to 3108ce24cd9SSimon Glass the resulting U-Boot image. It is a binary blob which U-Boot uses 3118ce24cd9SSimon Glass to set up SDRAM and other chipset specific initialization. 3128ce24cd9SSimon Glass 3138ce24cd9SSimon Glass Note: Without this binary U-Boot will not be able to set up its 3148ce24cd9SSimon Glass SDRAM so will not boot. 3158ce24cd9SSimon Glass 3168ce24cd9SSimon Glassconfig FSP_FILE 3178ce24cd9SSimon Glass string "Firmware Support Package binary filename" 3188ce24cd9SSimon Glass depends on HAVE_FSP 3198ce24cd9SSimon Glass default "fsp.bin" 3208ce24cd9SSimon Glass help 3218ce24cd9SSimon Glass The filename of the file to use as Firmware Support Package binary 3228ce24cd9SSimon Glass in the board directory. 3238ce24cd9SSimon Glass 3248ce24cd9SSimon Glassconfig FSP_ADDR 3258ce24cd9SSimon Glass hex "Firmware Support Package binary location" 3268ce24cd9SSimon Glass depends on HAVE_FSP 3278ce24cd9SSimon Glass default 0xfffc0000 3288ce24cd9SSimon Glass help 3298ce24cd9SSimon Glass FSP is not Position Independent Code (PIC) and the whole FSP has to 3308ce24cd9SSimon Glass be rebased if it is placed at a location which is different from the 3318ce24cd9SSimon Glass perferred base address specified during the FSP build. Use Intel's 3328ce24cd9SSimon Glass Binary Configuration Tool (BCT) to do the rebase. 3338ce24cd9SSimon Glass 3348ce24cd9SSimon Glass The default base address of 0xfffc0000 indicates that the binary must 3358ce24cd9SSimon Glass be located at offset 0xc0000 from the beginning of a 1MB flash device. 3368ce24cd9SSimon Glass 3378ce24cd9SSimon Glassconfig FSP_TEMP_RAM_ADDR 3388ce24cd9SSimon Glass hex 339d04e30b8SBin Meng depends on HAVE_FSP 3408ce24cd9SSimon Glass default 0x2000000 3418ce24cd9SSimon Glass help 34248aa6c26SBin Meng Stack top address which is used in fsp_init() after DRAM is ready and 3438ce24cd9SSimon Glass CAR is disabled. 3448ce24cd9SSimon Glass 34557b10f59SBin Mengconfig FSP_SYS_MALLOC_F_LEN 34657b10f59SBin Meng hex 34757b10f59SBin Meng depends on HAVE_FSP 34857b10f59SBin Meng default 0x100000 34957b10f59SBin Meng help 35057b10f59SBin Meng Additional size of malloc() pool before relocation. 35157b10f59SBin Meng 3523340f2ccSBin Mengconfig FSP_USE_UPD 3533340f2ccSBin Meng bool 3543340f2ccSBin Meng depends on HAVE_FSP 3553340f2ccSBin Meng default y 3563340f2ccSBin Meng help 3573340f2ccSBin Meng Most FSPs use UPD data region for some FSP customization. But there 3583340f2ccSBin Meng are still some FSPs that might not even have UPD. For such FSPs, 3593340f2ccSBin Meng override this to n in their platform Kconfig files. 3603340f2ccSBin Meng 361dc5be508SBin Mengconfig FSP_BROKEN_HOB 362dc5be508SBin Meng bool 363dc5be508SBin Meng depends on HAVE_FSP 364dc5be508SBin Meng help 365dc5be508SBin Meng Indicate some buggy FSPs that does not report memory used by FSP 366dc5be508SBin Meng itself as reserved in the resource descriptor HOB. Select this to 367dc5be508SBin Meng tell U-Boot to do some additional work to ensure U-Boot relocation 368dc5be508SBin Meng do not overwrite the important boot service data which is used by 369dc5be508SBin Meng FSP, otherwise the subsequent call to fsp_notify() will fail. 370dc5be508SBin Meng 371e2d76e95SBin Mengconfig ENABLE_MRC_CACHE 372e2d76e95SBin Meng bool "Enable MRC cache" 373e2d76e95SBin Meng depends on !EFI && !SYS_COREBOOT 374e2d76e95SBin Meng help 375e2d76e95SBin Meng Enable this feature to cause MRC data to be cached in NV storage 376e2d76e95SBin Meng to be used for speeding up boot time on future reboots and/or 377e2d76e95SBin Meng power cycles. 378e2d76e95SBin Meng 3795c60a3abSBin Meng For platforms that use Intel FSP for the memory initialization, 3805c60a3abSBin Meng please check FSP output HOB via U-Boot command 'fsp hob' to see 3815c60a3abSBin Meng if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h). 3825c60a3abSBin Meng If such GUID does not exist, MRC cache is not avaiable on such 3835c60a3abSBin Meng platform (eg: Intel Queensbay), which means selecting this option 3845c60a3abSBin Meng here does not make any difference. 3855c60a3abSBin Meng 386f7d35bc1SSimon Glassconfig HAVE_MRC 387f7d35bc1SSimon Glass bool "Add a System Agent binary" 388f7d35bc1SSimon Glass depends on !HAVE_FSP 389f7d35bc1SSimon Glass help 390f7d35bc1SSimon Glass Select this option to add a System Agent binary to 391f7d35bc1SSimon Glass the resulting U-Boot image. MRC stands for Memory Reference Code. 392f7d35bc1SSimon Glass It is a binary blob which U-Boot uses to set up SDRAM. 393f7d35bc1SSimon Glass 394f7d35bc1SSimon Glass Note: Without this binary U-Boot will not be able to set up its 395f7d35bc1SSimon Glass SDRAM so will not boot. 396f7d35bc1SSimon Glass 397f7d35bc1SSimon Glassconfig CACHE_MRC_BIN 398f7d35bc1SSimon Glass bool 399f7d35bc1SSimon Glass depends on HAVE_MRC 400f7d35bc1SSimon Glass default n 401f7d35bc1SSimon Glass help 402f7d35bc1SSimon Glass Enable caching for the memory reference code binary. This uses an 403f7d35bc1SSimon Glass MTRR (memory type range register) to turn on caching for the section 404f7d35bc1SSimon Glass of SPI flash that contains the memory reference code. This makes 405f7d35bc1SSimon Glass SDRAM init run faster. 406f7d35bc1SSimon Glass 407f7d35bc1SSimon Glassconfig CACHE_MRC_SIZE_KB 408f7d35bc1SSimon Glass int 409f7d35bc1SSimon Glass depends on HAVE_MRC 410f7d35bc1SSimon Glass default 512 411f7d35bc1SSimon Glass help 412f7d35bc1SSimon Glass Sets the size of the cached area for the memory reference code. 413f7d35bc1SSimon Glass This ends at the end of SPI flash (address 0xffffffff) and is 414f7d35bc1SSimon Glass measured in KB. Typically this is set to 512, providing for 0.5MB 415f7d35bc1SSimon Glass of cached space. 416f7d35bc1SSimon Glass 417f7d35bc1SSimon Glassconfig DCACHE_RAM_BASE 418f7d35bc1SSimon Glass hex 419f7d35bc1SSimon Glass depends on HAVE_MRC 420f7d35bc1SSimon Glass help 421f7d35bc1SSimon Glass Sets the base of the data cache area in memory space. This is the 422f7d35bc1SSimon Glass start address of the cache-as-RAM (CAR) area and the address varies 423f7d35bc1SSimon Glass depending on the CPU. Once CAR is set up, read/write memory becomes 424f7d35bc1SSimon Glass available at this address and can be used temporarily until SDRAM 425f7d35bc1SSimon Glass is working. 426f7d35bc1SSimon Glass 427f7d35bc1SSimon Glassconfig DCACHE_RAM_SIZE 428f7d35bc1SSimon Glass hex 429f7d35bc1SSimon Glass depends on HAVE_MRC 430f7d35bc1SSimon Glass default 0x40000 431f7d35bc1SSimon Glass help 432f7d35bc1SSimon Glass Sets the total size of the data cache area in memory space. This 433f7d35bc1SSimon Glass sets the size of the cache-as-RAM (CAR) area. Note that much of the 434f7d35bc1SSimon Glass CAR space is required by the MRC. The CAR space available to U-Boot 435f7d35bc1SSimon Glass is normally at the start and typically extends to 1/4 or 1/2 of the 436f7d35bc1SSimon Glass available size. 437f7d35bc1SSimon Glass 438f7d35bc1SSimon Glassconfig DCACHE_RAM_MRC_VAR_SIZE 439f7d35bc1SSimon Glass hex 440f7d35bc1SSimon Glass depends on HAVE_MRC 441f7d35bc1SSimon Glass help 442f7d35bc1SSimon Glass This is the amount of CAR (Cache as RAM) reserved for use by the 443f7d35bc1SSimon Glass memory reference code. This depends on the implementation of the 444f7d35bc1SSimon Glass memory reference code and must be set correctly or the board will 445f7d35bc1SSimon Glass not boot. 446f7d35bc1SSimon Glass 4470adf8d35SSimon Glassconfig HAVE_REFCODE 4480adf8d35SSimon Glass bool "Add a Reference Code binary" 4490adf8d35SSimon Glass help 4500adf8d35SSimon Glass Select this option to add a Reference Code binary to the resulting 4510adf8d35SSimon Glass U-Boot image. This is an Intel binary blob that handles system 4520adf8d35SSimon Glass initialisation, in this case the PCH and System Agent. 4530adf8d35SSimon Glass 4540adf8d35SSimon Glass Note: Without this binary (on platforms that need it such as 4550adf8d35SSimon Glass broadwell) U-Boot will be missing some critical setup steps. 4560adf8d35SSimon Glass Various peripherals may fail to work. 4570adf8d35SSimon Glass 4584c71322bSBin Mengconfig SMP 4594c71322bSBin Meng bool "Enable Symmetric Multiprocessing" 4604c71322bSBin Meng default n 4614c71322bSBin Meng help 4624c71322bSBin Meng Enable use of more than one CPU in U-Boot and the Operating System 4634c71322bSBin Meng when loaded. Each CPU will be started up and information can be 4644c71322bSBin Meng obtained using the 'cpu' command. If this option is disabled, then 4654c71322bSBin Meng only one CPU will be enabled regardless of the number of CPUs 4664c71322bSBin Meng available. 4674c71322bSBin Meng 46845b5a378SSimon Glassconfig MAX_CPUS 46945b5a378SSimon Glass int "Maximum number of CPUs permitted" 470063374d2SBin Meng depends on SMP 47145b5a378SSimon Glass default 4 47245b5a378SSimon Glass help 47345b5a378SSimon Glass When using multi-CPU chips it is possible for U-Boot to start up 47445b5a378SSimon Glass more than one CPU. The stack memory used by all of these CPUs is 47545b5a378SSimon Glass pre-allocated so at present U-Boot wants to know the maximum 47645b5a378SSimon Glass number of CPUs that may be present. Set this to at least as high 47745b5a378SSimon Glass as the number of CPUs in your system (it uses about 4KB of RAM for 47845b5a378SSimon Glass each CPU). 47945b5a378SSimon Glass 48045b5a378SSimon Glassconfig AP_STACK_SIZE 48145b5a378SSimon Glass hex 482063374d2SBin Meng depends on SMP 48345b5a378SSimon Glass default 0x1000 48445b5a378SSimon Glass help 48545b5a378SSimon Glass Each additional CPU started by U-Boot requires its own stack. This 48645b5a378SSimon Glass option sets the stack size used by each CPU and directly affects 48745b5a378SSimon Glass the memory used by this initialisation process. Typically 4KB is 48845b5a378SSimon Glass enough space. 48945b5a378SSimon Glass 490786a08e0SBin Mengconfig HAVE_VGA_BIOS 491786a08e0SBin Meng bool "Add a VGA BIOS image" 492786a08e0SBin Meng help 493786a08e0SBin Meng Select this option if you have a VGA BIOS image that you would 494786a08e0SBin Meng like to add to your ROM. 495786a08e0SBin Meng 496786a08e0SBin Mengconfig VGA_BIOS_FILE 497786a08e0SBin Meng string "VGA BIOS image filename" 498786a08e0SBin Meng depends on HAVE_VGA_BIOS 499786a08e0SBin Meng default "vga.bin" 500786a08e0SBin Meng help 501786a08e0SBin Meng The filename of the VGA BIOS image in the board directory. 502786a08e0SBin Meng 503786a08e0SBin Mengconfig VGA_BIOS_ADDR 504786a08e0SBin Meng hex "VGA BIOS image location" 505786a08e0SBin Meng depends on HAVE_VGA_BIOS 506786a08e0SBin Meng default 0xfff90000 507786a08e0SBin Meng help 508786a08e0SBin Meng The location of VGA BIOS image in the SPI flash. For example, base 509786a08e0SBin Meng address of 0xfff90000 indicates that the image will be put at offset 510786a08e0SBin Meng 0x90000 from the beginning of a 1MB flash device. 511786a08e0SBin Meng 512b5b6b019SBin Mengmenu "System tables" 5138744bef5SBin Meng depends on !EFI && !SYS_COREBOOT 514b5b6b019SBin Meng 515b5b6b019SBin Mengconfig GENERATE_PIRQ_TABLE 516b5b6b019SBin Meng bool "Generate a PIRQ table" 517b5b6b019SBin Meng default n 518b5b6b019SBin Meng help 519b5b6b019SBin Meng Generate a PIRQ routing table for this board. The PIRQ routing table 520b5b6b019SBin Meng is generated by U-Boot in the system memory from 0xf0000 to 0xfffff 521b5b6b019SBin Meng at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). 522b5b6b019SBin Meng It specifies the interrupt router information as well how all the PCI 523b5b6b019SBin Meng devices' interrupt pins are wired to PIRQs. 524b5b6b019SBin Meng 5256388e357SSimon Glassconfig GENERATE_SFI_TABLE 5266388e357SSimon Glass bool "Generate a SFI (Simple Firmware Interface) table" 5276388e357SSimon Glass help 5286388e357SSimon Glass The Simple Firmware Interface (SFI) provides a lightweight method 5296388e357SSimon Glass for platform firmware to pass information to the operating system 5306388e357SSimon Glass via static tables in memory. Kernel SFI support is required to 5316388e357SSimon Glass boot on SFI-only platforms. If you have ACPI tables then these are 5326388e357SSimon Glass used instead. 5336388e357SSimon Glass 5346388e357SSimon Glass U-Boot writes this table in write_sfi_table() just before booting 5356388e357SSimon Glass the OS. 5366388e357SSimon Glass 5376388e357SSimon Glass For more information, see http://simplefirmware.org 5386388e357SSimon Glass 53907545d86SBin Mengconfig GENERATE_MP_TABLE 54007545d86SBin Meng bool "Generate an MP (Multi-Processor) table" 54107545d86SBin Meng default n 54207545d86SBin Meng help 54307545d86SBin Meng Generate an MP (Multi-Processor) table for this board. The MP table 54407545d86SBin Meng provides a way for the operating system to support for symmetric 54507545d86SBin Meng multiprocessing as well as symmetric I/O interrupt handling with 54607545d86SBin Meng the local APIC and I/O APIC. 54707545d86SBin Meng 548867bcb63SSaket Sinhaconfig GENERATE_ACPI_TABLE 549867bcb63SSaket Sinha bool "Generate an ACPI (Advanced Configuration and Power Interface) table" 550867bcb63SSaket Sinha default n 551fcf5c041SMiao Yan select QFW if QEMU 552867bcb63SSaket Sinha help 553867bcb63SSaket Sinha The Advanced Configuration and Power Interface (ACPI) specification 554867bcb63SSaket Sinha provides an open standard for device configuration and management 555867bcb63SSaket Sinha by the operating system. It defines platform-independent interfaces 556867bcb63SSaket Sinha for configuration and power management monitoring. 557867bcb63SSaket Sinha 558b5b6b019SBin Mengendmenu 559b5b6b019SBin Meng 560b5b6b019SBin Mengconfig MAX_PIRQ_LINKS 561b5b6b019SBin Meng int 562b5b6b019SBin Meng default 8 563b5b6b019SBin Meng help 564b5b6b019SBin Meng This variable specifies the number of PIRQ interrupt links which are 565b5b6b019SBin Meng routable. On most older chipsets, this is 4, PIRQA through PIRQD. 566b5b6b019SBin Meng Some newer chipsets offer more than four links, commonly up to PIRQH. 567b5b6b019SBin Meng 568b5b6b019SBin Mengconfig IRQ_SLOT_COUNT 569b5b6b019SBin Meng int 570b5b6b019SBin Meng default 128 571b5b6b019SBin Meng help 572b5b6b019SBin Meng U-Boot can support up to 254 IRQ slot info in the PIRQ routing table 573b5b6b019SBin Meng which in turns forms a table of exact 4KiB. The default value 128 574b5b6b019SBin Meng should be enough for most boards. If this does not fit your board, 575b5b6b019SBin Meng change it according to your needs. 576b5b6b019SBin Meng 5772d934e57SSimon Glassconfig PCIE_ECAM_BASE 5782d934e57SSimon Glass hex 5792d934e57SSimon Glass default 0xe0000000 5802d934e57SSimon Glass help 5812d934e57SSimon Glass This is the memory-mapped address of PCI configuration space, which 5822d934e57SSimon Glass is only available through the Enhanced Configuration Access 5832d934e57SSimon Glass Mechanism (ECAM) with PCI Express. It can be set up almost 5842d934e57SSimon Glass anywhere. Before it is set up, it is possible to access PCI 5852d934e57SSimon Glass configuration space through I/O access, but memory access is more 5862d934e57SSimon Glass convenient. Using this, PCI can be scanned and configured. This 5872d934e57SSimon Glass should be set to a region that does not conflict with memory 5882d934e57SSimon Glass assigned to PCI devices - i.e. the memory and prefetch regions, as 5892d934e57SSimon Glass passed to pci_set_region(). 5902d934e57SSimon Glass 5911ed6648bSBin Mengconfig PCIE_ECAM_SIZE 5921ed6648bSBin Meng hex 5931ed6648bSBin Meng default 0x10000000 5941ed6648bSBin Meng help 5951ed6648bSBin Meng This is the size of memory-mapped address of PCI configuration space, 5961ed6648bSBin Meng which is only available through the Enhanced Configuration Access 5971ed6648bSBin Meng Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory, 5981ed6648bSBin Meng so a default 0x10000000 size covers all of the 256 buses which is the 5991ed6648bSBin Meng maximum number of PCI buses as defined by the PCI specification. 6001ed6648bSBin Meng 6011eb39a50SBin Mengconfig I8259_PIC 6021eb39a50SBin Meng bool 6031eb39a50SBin Meng default y 6041eb39a50SBin Meng help 6051eb39a50SBin Meng Intel 8259 ISA compatible chipset incorporates two 8259 (master and 6061eb39a50SBin Meng slave) interrupt controllers. Include this to have U-Boot set up 6071eb39a50SBin Meng the interrupt correctly. 6081eb39a50SBin Meng 6091eb39a50SBin Mengconfig I8254_TIMER 6101eb39a50SBin Meng bool 6111eb39a50SBin Meng default y 6121eb39a50SBin Meng help 6131eb39a50SBin Meng Intel 8254 timer contains three counters which have fixed uses. 6141eb39a50SBin Meng Include this to have U-Boot set up the timer correctly. 6151eb39a50SBin Meng 6163cf23719SBin Mengconfig SEABIOS 6173cf23719SBin Meng bool "Support booting SeaBIOS" 6183cf23719SBin Meng help 6193cf23719SBin Meng SeaBIOS is an open source implementation of a 16-bit X86 BIOS. 6203cf23719SBin Meng It can run in an emulator or natively on X86 hardware with the use 6213cf23719SBin Meng of coreboot/U-Boot. By turning on this option, U-Boot prepares 6223cf23719SBin Meng all the configuration tables that are necessary to boot SeaBIOS. 6233cf23719SBin Meng 6243cf23719SBin Meng Check http://www.seabios.org/SeaBIOS for details. 6253cf23719SBin Meng 626789b6dceSBin Mengconfig HIGH_TABLE_SIZE 627789b6dceSBin Meng hex "Size of configuration tables which reside in high memory" 628789b6dceSBin Meng default 0x10000 629789b6dceSBin Meng depends on SEABIOS 630789b6dceSBin Meng help 631789b6dceSBin Meng SeaBIOS itself resides in E seg and F seg, where U-Boot puts all 632789b6dceSBin Meng configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot 633789b6dceSBin Meng puts a copy of configuration tables in high memory region which 634789b6dceSBin Meng is reserved on the stack before relocation. The region size is 635789b6dceSBin Meng determined by this option. 636789b6dceSBin Meng 637789b6dceSBin Meng Increse it if the default size does not fit the board's needs. 638789b6dceSBin Meng This is most likely due to a large ACPI DSDT table is used. 639789b6dceSBin Meng 640e49cceacSSimon Glasssource "arch/x86/lib/efi/Kconfig" 641e49cceacSSimon Glass 642dd84058dSMasahiro Yamadaendmenu 643