1*2a57e7ecSNobuhiro Iwamatsu /* 2*2a57e7ecSNobuhiro Iwamatsu * (C) Copyright 2008, 2011 Renesas Solutions Corp. 3*2a57e7ecSNobuhiro Iwamatsu * 4*2a57e7ecSNobuhiro Iwamatsu * SH7734 Internal I/O register 5*2a57e7ecSNobuhiro Iwamatsu * 6*2a57e7ecSNobuhiro Iwamatsu * This program is free software; you can redistribute it and/or 7*2a57e7ecSNobuhiro Iwamatsu * modify it under the terms of the GNU General Public License as 8*2a57e7ecSNobuhiro Iwamatsu * published by the Free Software Foundation; either version 2 of 9*2a57e7ecSNobuhiro Iwamatsu * the License, or (at your option) any later version. 10*2a57e7ecSNobuhiro Iwamatsu * 11*2a57e7ecSNobuhiro Iwamatsu * This program is distributed in the hope that it will be useful, 12*2a57e7ecSNobuhiro Iwamatsu * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*2a57e7ecSNobuhiro Iwamatsu * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*2a57e7ecSNobuhiro Iwamatsu * GNU General Public License for more details. 15*2a57e7ecSNobuhiro Iwamatsu * 16*2a57e7ecSNobuhiro Iwamatsu * You should have received a copy of the GNU General Public License 17*2a57e7ecSNobuhiro Iwamatsu * along with this program; if not, write to the Free Software 18*2a57e7ecSNobuhiro Iwamatsu * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 19*2a57e7ecSNobuhiro Iwamatsu * MA 02111-1307 USA 20*2a57e7ecSNobuhiro Iwamatsu */ 21*2a57e7ecSNobuhiro Iwamatsu 22*2a57e7ecSNobuhiro Iwamatsu #ifndef _ASM_CPU_SH7734_H_ 23*2a57e7ecSNobuhiro Iwamatsu #define _ASM_CPU_SH7734_H_ 24*2a57e7ecSNobuhiro Iwamatsu 25*2a57e7ecSNobuhiro Iwamatsu #define CCR 0xFF00001C 26*2a57e7ecSNobuhiro Iwamatsu 27*2a57e7ecSNobuhiro Iwamatsu #define CACHE_OC_NUM_WAYS 4 28*2a57e7ecSNobuhiro Iwamatsu #define CCR_CACHE_INIT 0x0000090d 29*2a57e7ecSNobuhiro Iwamatsu 30*2a57e7ecSNobuhiro Iwamatsu /* SCIF */ 31*2a57e7ecSNobuhiro Iwamatsu #define SCIF0_BASE 0xFFE40000 32*2a57e7ecSNobuhiro Iwamatsu #define SCIF1_BASE 0xFFE41000 33*2a57e7ecSNobuhiro Iwamatsu #define SCIF2_BASE 0xFFE42000 34*2a57e7ecSNobuhiro Iwamatsu #define SCIF3_BASE 0xFFE43000 35*2a57e7ecSNobuhiro Iwamatsu #define SCIF4_BASE 0xFFE44000 36*2a57e7ecSNobuhiro Iwamatsu #define SCIF5_BASE 0xFFE45000 37*2a57e7ecSNobuhiro Iwamatsu 38*2a57e7ecSNobuhiro Iwamatsu /* Timer */ 39*2a57e7ecSNobuhiro Iwamatsu #define TSTR 0xFFD80004 40*2a57e7ecSNobuhiro Iwamatsu #define TCNT0 0xFFD8000C 41*2a57e7ecSNobuhiro Iwamatsu #define TCR0 0xFFD80010 42*2a57e7ecSNobuhiro Iwamatsu 43*2a57e7ecSNobuhiro Iwamatsu #endif /* _ASM_CPU_SH7734_H_ */ 44