xref: /rk3399_rockchip-uboot/arch/sh/include/asm/cpu_sh4.h (revision 8e9c897b2120ccf4e1177bf3662010f6d073aa64)
1819833afSPeter Tyser /*
2819833afSPeter Tyser  * (C) Copyright 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
3819833afSPeter Tyser  *
4819833afSPeter Tyser  * This program is free software; you can redistribute it and/or
5819833afSPeter Tyser  * modify it under the terms of the GNU General Public License as
6819833afSPeter Tyser  * published by the Free Software Foundation; either version 2 of
7819833afSPeter Tyser  * the License, or (at your option) any later version.
8819833afSPeter Tyser  *
9819833afSPeter Tyser  * This program is distributed in the hope that it will be useful,
10819833afSPeter Tyser  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11819833afSPeter Tyser  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12819833afSPeter Tyser  * GNU General Public License for more details.
13819833afSPeter Tyser  *
14819833afSPeter Tyser  * You should have received a copy of the GNU General Public License
15819833afSPeter Tyser  * along with this program; if not, write to the Free Software
16819833afSPeter Tyser  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17819833afSPeter Tyser  * MA 02111-1307 USA
18819833afSPeter Tyser  */
19819833afSPeter Tyser 
20819833afSPeter Tyser #ifndef _ASM_CPU_SH4_H_
21819833afSPeter Tyser #define _ASM_CPU_SH4_H_
22819833afSPeter Tyser 
23819833afSPeter Tyser /* cache control */
24819833afSPeter Tyser #define CCR_CACHE_STOP   0x00000808
25819833afSPeter Tyser #define CCR_CACHE_ENABLE 0x00000101
26819833afSPeter Tyser #define CCR_CACHE_ICI    0x00000800
27819833afSPeter Tyser 
28819833afSPeter Tyser #define CACHE_OC_ADDRESS_ARRAY	0xf4000000
29819833afSPeter Tyser 
30819833afSPeter Tyser #if defined (CONFIG_CPU_SH7750) || \
31819833afSPeter Tyser 	defined(CONFIG_CPU_SH7751)
32819833afSPeter Tyser #define CACHE_OC_WAY_SHIFT	14
33819833afSPeter Tyser #define CACHE_OC_NUM_ENTRIES	512
34819833afSPeter Tyser #else
35819833afSPeter Tyser #define CACHE_OC_WAY_SHIFT	13
36819833afSPeter Tyser #define CACHE_OC_NUM_ENTRIES	256
37819833afSPeter Tyser #endif
38819833afSPeter Tyser #define CACHE_OC_ENTRY_SHIFT	5
39819833afSPeter Tyser 
40819833afSPeter Tyser #if defined (CONFIG_CPU_SH7750) || \
41819833afSPeter Tyser 	defined(CONFIG_CPU_SH7751)
42819833afSPeter Tyser # include <asm/cpu_sh7750.h>
43819833afSPeter Tyser #elif defined (CONFIG_CPU_SH7722)
44819833afSPeter Tyser # include <asm/cpu_sh7722.h>
45819833afSPeter Tyser #elif defined (CONFIG_CPU_SH7723)
46819833afSPeter Tyser # include <asm/cpu_sh7723.h>
47*8e9c897bSYoshihiro Shimoda #elif defined (CONFIG_CPU_SH7757)
48*8e9c897bSYoshihiro Shimoda # include <asm/cpu_sh7757.h>
49819833afSPeter Tyser #elif defined (CONFIG_CPU_SH7763)
50819833afSPeter Tyser # include <asm/cpu_sh7763.h>
51819833afSPeter Tyser #elif defined (CONFIG_CPU_SH7780)
52819833afSPeter Tyser # include <asm/cpu_sh7780.h>
53819833afSPeter Tyser #elif defined (CONFIG_CPU_SH7785)
54819833afSPeter Tyser # include <asm/cpu_sh7785.h>
55819833afSPeter Tyser #else
56819833afSPeter Tyser # error "Unknown SH4 variant"
57819833afSPeter Tyser #endif
58819833afSPeter Tyser 
59819833afSPeter Tyser #if defined(CONFIG_SH_32BIT)
60819833afSPeter Tyser #define PMB_ADDR_ARRAY		0xf6100000
61819833afSPeter Tyser #define PMB_ADDR_ENTRY		8
62819833afSPeter Tyser #define PMB_VPN			24
63819833afSPeter Tyser 
64819833afSPeter Tyser #define PMB_DATA_ARRAY		0xf7100000
65819833afSPeter Tyser #define PMB_DATA_ENTRY		8
66819833afSPeter Tyser #define PMB_PPN			24
67819833afSPeter Tyser #define PMB_UB			9		/* Buffered write */
68819833afSPeter Tyser #define PMB_V			8		/* Valid */
69819833afSPeter Tyser #define PMB_SZ1			7		/* Page size (upper bit) */
70819833afSPeter Tyser #define PMB_SZ0			4		/* Page size (lower bit) */
71819833afSPeter Tyser #define PMB_C			3		/* Cacheability */
72819833afSPeter Tyser #define PMB_WT			0		/* Write-through */
73819833afSPeter Tyser 
74819833afSPeter Tyser #define PMB_ADDR_BASE(entry)	(PMB_ADDR_ARRAY + (entry << PMB_ADDR_ENTRY))
75819833afSPeter Tyser #define PMB_DATA_BASE(entry)	(PMB_DATA_ARRAY + (entry << PMB_DATA_ENTRY))
76819833afSPeter Tyser #define mk_pmb_addr_val(vpn)	((vpn << PMB_VPN))
77819833afSPeter Tyser #define mk_pmb_data_val(ppn, ub, v, sz1, sz0, c, wt)	\
78819833afSPeter Tyser 				((ppn << PMB_PPN) | (ub << PMB_UB) | \
79819833afSPeter Tyser 				 (v << PMB_V) | (sz1 << PMB_SZ1) | \
80819833afSPeter Tyser 				 (sz0 << PMB_SZ0) | (c << PMB_C) | \
81819833afSPeter Tyser 				 (wt << PMB_WT))
82819833afSPeter Tyser #endif
83819833afSPeter Tyser 
84819833afSPeter Tyser #endif	/* _ASM_CPU_SH4_H_ */
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