1*8f0fec74SPeter Tyser /* 2*8f0fec74SPeter Tyser * (C) Copyright 2007 3*8f0fec74SPeter Tyser * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 4*8f0fec74SPeter Tyser * 5*8f0fec74SPeter Tyser * See file CREDITS for list of people who contributed to this 6*8f0fec74SPeter Tyser * project. 7*8f0fec74SPeter Tyser * 8*8f0fec74SPeter Tyser * This program is free software; you can redistribute it and/or 9*8f0fec74SPeter Tyser * modify it under the terms of the GNU General Public License as 10*8f0fec74SPeter Tyser * published by the Free Software Foundation; either version 2 of 11*8f0fec74SPeter Tyser * the License, or (at your option) any later version. 12*8f0fec74SPeter Tyser * 13*8f0fec74SPeter Tyser * This program is distributed in the hope that it will be useful, 14*8f0fec74SPeter Tyser * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*8f0fec74SPeter Tyser * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*8f0fec74SPeter Tyser * GNU General Public License for more details. 17*8f0fec74SPeter Tyser * 18*8f0fec74SPeter Tyser * You should have received a copy of the GNU General Public License 19*8f0fec74SPeter Tyser * along with this program; if not, write to the Free Software 20*8f0fec74SPeter Tyser * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21*8f0fec74SPeter Tyser * MA 02111-1307 USA 22*8f0fec74SPeter Tyser */ 23*8f0fec74SPeter Tyser 24*8f0fec74SPeter Tyser #include <common.h> 25*8f0fec74SPeter Tyser #include <command.h> 26*8f0fec74SPeter Tyser #include <asm/processor.h> 27*8f0fec74SPeter Tyser #include <asm/io.h> 28*8f0fec74SPeter Tyser 29*8f0fec74SPeter Tyser /* 30*8f0fec74SPeter Tyser * Jump to P2 area. 31*8f0fec74SPeter Tyser * When handling TLB or caches, we need to do it from P2 area. 32*8f0fec74SPeter Tyser */ 33*8f0fec74SPeter Tyser #define jump_to_P2() \ 34*8f0fec74SPeter Tyser do { \ 35*8f0fec74SPeter Tyser unsigned long __dummy; \ 36*8f0fec74SPeter Tyser __asm__ __volatile__( \ 37*8f0fec74SPeter Tyser "mov.l 1f, %0\n\t" \ 38*8f0fec74SPeter Tyser "or %1, %0\n\t" \ 39*8f0fec74SPeter Tyser "jmp @%0\n\t" \ 40*8f0fec74SPeter Tyser " nop\n\t" \ 41*8f0fec74SPeter Tyser ".balign 4\n" \ 42*8f0fec74SPeter Tyser "1: .long 2f\n" \ 43*8f0fec74SPeter Tyser "2:" \ 44*8f0fec74SPeter Tyser : "=&r" (__dummy) \ 45*8f0fec74SPeter Tyser : "r" (0x20000000)); \ 46*8f0fec74SPeter Tyser } while (0) 47*8f0fec74SPeter Tyser 48*8f0fec74SPeter Tyser /* 49*8f0fec74SPeter Tyser * Back to P1 area. 50*8f0fec74SPeter Tyser */ 51*8f0fec74SPeter Tyser #define back_to_P1() \ 52*8f0fec74SPeter Tyser do { \ 53*8f0fec74SPeter Tyser unsigned long __dummy; \ 54*8f0fec74SPeter Tyser __asm__ __volatile__( \ 55*8f0fec74SPeter Tyser "nop;nop;nop;nop;nop;nop;nop\n\t" \ 56*8f0fec74SPeter Tyser "mov.l 1f, %0\n\t" \ 57*8f0fec74SPeter Tyser "jmp @%0\n\t" \ 58*8f0fec74SPeter Tyser " nop\n\t" \ 59*8f0fec74SPeter Tyser ".balign 4\n" \ 60*8f0fec74SPeter Tyser "1: .long 2f\n" \ 61*8f0fec74SPeter Tyser "2:" \ 62*8f0fec74SPeter Tyser : "=&r" (__dummy)); \ 63*8f0fec74SPeter Tyser } while (0) 64*8f0fec74SPeter Tyser 65*8f0fec74SPeter Tyser #define CACHE_VALID 1 66*8f0fec74SPeter Tyser #define CACHE_UPDATED 2 67*8f0fec74SPeter Tyser 68*8f0fec74SPeter Tyser static inline void cache_wback_all(void) 69*8f0fec74SPeter Tyser { 70*8f0fec74SPeter Tyser unsigned long addr, data, i, j; 71*8f0fec74SPeter Tyser 72*8f0fec74SPeter Tyser jump_to_P2(); 73*8f0fec74SPeter Tyser for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++){ 74*8f0fec74SPeter Tyser for (j = 0; j < CACHE_OC_NUM_WAYS; j++) { 75*8f0fec74SPeter Tyser addr = CACHE_OC_ADDRESS_ARRAY | (j << CACHE_OC_WAY_SHIFT) 76*8f0fec74SPeter Tyser | (i << CACHE_OC_ENTRY_SHIFT); 77*8f0fec74SPeter Tyser data = inl(addr); 78*8f0fec74SPeter Tyser if (data & CACHE_UPDATED) { 79*8f0fec74SPeter Tyser data &= ~CACHE_UPDATED; 80*8f0fec74SPeter Tyser outl(data, addr); 81*8f0fec74SPeter Tyser } 82*8f0fec74SPeter Tyser } 83*8f0fec74SPeter Tyser } 84*8f0fec74SPeter Tyser back_to_P1(); 85*8f0fec74SPeter Tyser } 86*8f0fec74SPeter Tyser 87*8f0fec74SPeter Tyser 88*8f0fec74SPeter Tyser #define CACHE_ENABLE 0 89*8f0fec74SPeter Tyser #define CACHE_DISABLE 1 90*8f0fec74SPeter Tyser 91*8f0fec74SPeter Tyser int cache_control(unsigned int cmd) 92*8f0fec74SPeter Tyser { 93*8f0fec74SPeter Tyser unsigned long ccr; 94*8f0fec74SPeter Tyser 95*8f0fec74SPeter Tyser jump_to_P2(); 96*8f0fec74SPeter Tyser ccr = inl(CCR); 97*8f0fec74SPeter Tyser 98*8f0fec74SPeter Tyser if (ccr & CCR_CACHE_ENABLE) 99*8f0fec74SPeter Tyser cache_wback_all(); 100*8f0fec74SPeter Tyser 101*8f0fec74SPeter Tyser if (cmd == CACHE_DISABLE) 102*8f0fec74SPeter Tyser outl(CCR_CACHE_STOP, CCR); 103*8f0fec74SPeter Tyser else 104*8f0fec74SPeter Tyser outl(CCR_CACHE_INIT, CCR); 105*8f0fec74SPeter Tyser back_to_P1(); 106*8f0fec74SPeter Tyser 107*8f0fec74SPeter Tyser return 0; 108*8f0fec74SPeter Tyser } 109