xref: /rk3399_rockchip-uboot/arch/sh/cpu/sh2/cpu.c (revision 8f0fec74ac6d0f3a7134ccebafa1ed9bd8c712ba)
1*8f0fec74SPeter Tyser /*
2*8f0fec74SPeter Tyser  * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
3*8f0fec74SPeter Tyser  * Copyright (C) 2008 Renesas Solutions Corp.
4*8f0fec74SPeter Tyser  *
5*8f0fec74SPeter Tyser  * See file CREDITS for list of people who contributed to this
6*8f0fec74SPeter Tyser  * project.
7*8f0fec74SPeter Tyser  *
8*8f0fec74SPeter Tyser  * This program is free software; you can redistribute it and/or
9*8f0fec74SPeter Tyser  * modify it under the terms of the GNU General Public License as
10*8f0fec74SPeter Tyser  * published by the Free Software Foundation; either version 2 of
11*8f0fec74SPeter Tyser  * the License, or (at your option) any later version.
12*8f0fec74SPeter Tyser  *
13*8f0fec74SPeter Tyser  * This program is distributed in the hope that it will be useful,
14*8f0fec74SPeter Tyser  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15*8f0fec74SPeter Tyser  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16*8f0fec74SPeter Tyser  * GNU General Public License for more details.
17*8f0fec74SPeter Tyser  *
18*8f0fec74SPeter Tyser  * You should have received a copy of the GNU General Public License
19*8f0fec74SPeter Tyser  * along with this program; if not, write to the Free Software
20*8f0fec74SPeter Tyser  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21*8f0fec74SPeter Tyser  * MA 02111-1307 USA
22*8f0fec74SPeter Tyser  */
23*8f0fec74SPeter Tyser 
24*8f0fec74SPeter Tyser #include <common.h>
25*8f0fec74SPeter Tyser #include <command.h>
26*8f0fec74SPeter Tyser #include <asm/processor.h>
27*8f0fec74SPeter Tyser #include <asm/io.h>
28*8f0fec74SPeter Tyser 
29*8f0fec74SPeter Tyser #define STBCR4      0xFFFE040C
30*8f0fec74SPeter Tyser #define cmt_clock_enable() do {\
31*8f0fec74SPeter Tyser 		writeb(readb(STBCR4) & ~0x04, STBCR4);\
32*8f0fec74SPeter Tyser 	} while (0)
33*8f0fec74SPeter Tyser #define scif0_enable() do {\
34*8f0fec74SPeter Tyser 		writeb(readb(STBCR4) & ~0x80, STBCR4);\
35*8f0fec74SPeter Tyser 	} while (0)
36*8f0fec74SPeter Tyser 
37*8f0fec74SPeter Tyser int checkcpu(void)
38*8f0fec74SPeter Tyser {
39*8f0fec74SPeter Tyser #if defined(CONFIG_SH2A)
40*8f0fec74SPeter Tyser 	puts("CPU: SH2A\n");
41*8f0fec74SPeter Tyser #else
42*8f0fec74SPeter Tyser 	puts("CPU: SH2\n");
43*8f0fec74SPeter Tyser #endif
44*8f0fec74SPeter Tyser 	return 0;
45*8f0fec74SPeter Tyser }
46*8f0fec74SPeter Tyser 
47*8f0fec74SPeter Tyser int cpu_init(void)
48*8f0fec74SPeter Tyser {
49*8f0fec74SPeter Tyser 	/* SCIF enable */
50*8f0fec74SPeter Tyser 	scif0_enable();
51*8f0fec74SPeter Tyser 	/* CMT clock enable */
52*8f0fec74SPeter Tyser 	cmt_clock_enable() ;
53*8f0fec74SPeter Tyser 	return 0;
54*8f0fec74SPeter Tyser }
55*8f0fec74SPeter Tyser 
56*8f0fec74SPeter Tyser int cleanup_before_linux(void)
57*8f0fec74SPeter Tyser {
58*8f0fec74SPeter Tyser 	disable_interrupts();
59*8f0fec74SPeter Tyser 	return 0;
60*8f0fec74SPeter Tyser }
61*8f0fec74SPeter Tyser 
62*8f0fec74SPeter Tyser int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
63*8f0fec74SPeter Tyser {
64*8f0fec74SPeter Tyser 	disable_interrupts();
65*8f0fec74SPeter Tyser 	reset_cpu(0);
66*8f0fec74SPeter Tyser 	return 0;
67*8f0fec74SPeter Tyser }
68*8f0fec74SPeter Tyser 
69*8f0fec74SPeter Tyser void flush_cache(unsigned long addr, unsigned long size)
70*8f0fec74SPeter Tyser {
71*8f0fec74SPeter Tyser 
72*8f0fec74SPeter Tyser }
73*8f0fec74SPeter Tyser 
74*8f0fec74SPeter Tyser void icache_enable(void)
75*8f0fec74SPeter Tyser {
76*8f0fec74SPeter Tyser }
77*8f0fec74SPeter Tyser 
78*8f0fec74SPeter Tyser void icache_disable(void)
79*8f0fec74SPeter Tyser {
80*8f0fec74SPeter Tyser }
81*8f0fec74SPeter Tyser 
82*8f0fec74SPeter Tyser int icache_status(void)
83*8f0fec74SPeter Tyser {
84*8f0fec74SPeter Tyser 	return 0;
85*8f0fec74SPeter Tyser }
86*8f0fec74SPeter Tyser 
87*8f0fec74SPeter Tyser void dcache_enable(void)
88*8f0fec74SPeter Tyser {
89*8f0fec74SPeter Tyser }
90*8f0fec74SPeter Tyser 
91*8f0fec74SPeter Tyser void dcache_disable(void)
92*8f0fec74SPeter Tyser {
93*8f0fec74SPeter Tyser }
94*8f0fec74SPeter Tyser 
95*8f0fec74SPeter Tyser int dcache_status(void)
96*8f0fec74SPeter Tyser {
97*8f0fec74SPeter Tyser 	return 0;
98*8f0fec74SPeter Tyser }
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