xref: /rk3399_rockchip-uboot/arch/sh/cpu/sh2/cpu.c (revision 7fbeb6422d9fb32063c8357fcdee99f0088a1a7f)
18f0fec74SPeter Tyser /*
28f0fec74SPeter Tyser  * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
38f0fec74SPeter Tyser  * Copyright (C) 2008 Renesas Solutions Corp.
48f0fec74SPeter Tyser  *
58f0fec74SPeter Tyser  * See file CREDITS for list of people who contributed to this
68f0fec74SPeter Tyser  * project.
78f0fec74SPeter Tyser  *
88f0fec74SPeter Tyser  * This program is free software; you can redistribute it and/or
98f0fec74SPeter Tyser  * modify it under the terms of the GNU General Public License as
108f0fec74SPeter Tyser  * published by the Free Software Foundation; either version 2 of
118f0fec74SPeter Tyser  * the License, or (at your option) any later version.
128f0fec74SPeter Tyser  *
138f0fec74SPeter Tyser  * This program is distributed in the hope that it will be useful,
148f0fec74SPeter Tyser  * but WITHOUT ANY WARRANTY; without even the implied warranty of
158f0fec74SPeter Tyser  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
168f0fec74SPeter Tyser  * GNU General Public License for more details.
178f0fec74SPeter Tyser  *
188f0fec74SPeter Tyser  * You should have received a copy of the GNU General Public License
198f0fec74SPeter Tyser  * along with this program; if not, write to the Free Software
208f0fec74SPeter Tyser  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
218f0fec74SPeter Tyser  * MA 02111-1307 USA
228f0fec74SPeter Tyser  */
238f0fec74SPeter Tyser 
248f0fec74SPeter Tyser #include <common.h>
258f0fec74SPeter Tyser #include <command.h>
268f0fec74SPeter Tyser #include <asm/processor.h>
278f0fec74SPeter Tyser #include <asm/io.h>
288f0fec74SPeter Tyser 
298f0fec74SPeter Tyser #define STBCR4      0xFFFE040C
308f0fec74SPeter Tyser #define cmt_clock_enable() do {\
318f0fec74SPeter Tyser 		writeb(readb(STBCR4) & ~0x04, STBCR4);\
328f0fec74SPeter Tyser 	} while (0)
338f0fec74SPeter Tyser #define scif0_enable() do {\
348f0fec74SPeter Tyser 		writeb(readb(STBCR4) & ~0x80, STBCR4);\
358f0fec74SPeter Tyser 	} while (0)
36*7fbeb642SPhil Edworthy #define scif3_enable() do {\
37*7fbeb642SPhil Edworthy 		writeb(readb(STBCR4) & ~0x10, STBCR4);\
38*7fbeb642SPhil Edworthy 	} while (0)
398f0fec74SPeter Tyser 
408f0fec74SPeter Tyser int checkcpu(void)
418f0fec74SPeter Tyser {
428f0fec74SPeter Tyser #if defined(CONFIG_SH2A)
438f0fec74SPeter Tyser 	puts("CPU: SH2A\n");
448f0fec74SPeter Tyser #else
458f0fec74SPeter Tyser 	puts("CPU: SH2\n");
468f0fec74SPeter Tyser #endif
478f0fec74SPeter Tyser 	return 0;
488f0fec74SPeter Tyser }
498f0fec74SPeter Tyser 
508f0fec74SPeter Tyser int cpu_init(void)
518f0fec74SPeter Tyser {
528f0fec74SPeter Tyser 	/* SCIF enable */
53*7fbeb642SPhil Edworthy #if defined(CONFIG_CONS_SCIF3)
54*7fbeb642SPhil Edworthy 	scif3_enable();
55*7fbeb642SPhil Edworthy #else
568f0fec74SPeter Tyser 	scif0_enable();
57*7fbeb642SPhil Edworthy #endif
588f0fec74SPeter Tyser 	/* CMT clock enable */
598f0fec74SPeter Tyser 	cmt_clock_enable() ;
608f0fec74SPeter Tyser 	return 0;
618f0fec74SPeter Tyser }
628f0fec74SPeter Tyser 
638f0fec74SPeter Tyser int cleanup_before_linux(void)
648f0fec74SPeter Tyser {
658f0fec74SPeter Tyser 	disable_interrupts();
668f0fec74SPeter Tyser 	return 0;
678f0fec74SPeter Tyser }
688f0fec74SPeter Tyser 
6954841ab5SWolfgang Denk int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
708f0fec74SPeter Tyser {
718f0fec74SPeter Tyser 	disable_interrupts();
728f0fec74SPeter Tyser 	reset_cpu(0);
738f0fec74SPeter Tyser 	return 0;
748f0fec74SPeter Tyser }
758f0fec74SPeter Tyser 
768f0fec74SPeter Tyser void flush_cache(unsigned long addr, unsigned long size)
778f0fec74SPeter Tyser {
788f0fec74SPeter Tyser 
798f0fec74SPeter Tyser }
808f0fec74SPeter Tyser 
818f0fec74SPeter Tyser void icache_enable(void)
828f0fec74SPeter Tyser {
838f0fec74SPeter Tyser }
848f0fec74SPeter Tyser 
858f0fec74SPeter Tyser void icache_disable(void)
868f0fec74SPeter Tyser {
878f0fec74SPeter Tyser }
888f0fec74SPeter Tyser 
898f0fec74SPeter Tyser int icache_status(void)
908f0fec74SPeter Tyser {
918f0fec74SPeter Tyser 	return 0;
928f0fec74SPeter Tyser }
938f0fec74SPeter Tyser 
948f0fec74SPeter Tyser void dcache_enable(void)
958f0fec74SPeter Tyser {
968f0fec74SPeter Tyser }
978f0fec74SPeter Tyser 
988f0fec74SPeter Tyser void dcache_disable(void)
998f0fec74SPeter Tyser {
1008f0fec74SPeter Tyser }
1018f0fec74SPeter Tyser 
1028f0fec74SPeter Tyser int dcache_status(void)
1038f0fec74SPeter Tyser {
1048f0fec74SPeter Tyser 	return 0;
1058f0fec74SPeter Tyser }
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