1/dts-v1/; 2 3/ { 4 #address-cells = <1>; 5 #size-cells = <1>; 6 7 aliases { 8 eth5 = "/eth@90000000"; 9 pci0 = &pci; 10 }; 11 12 chosen { 13 stdout-path = "/serial"; 14 }; 15 16 /* Needs to be available prior to relocation */ 17 uart0: serial { 18 compatible = "sandbox,serial"; 19 sandbox,text-colour = "cyan"; 20 }; 21 22 triangle { 23 compatible = "demo-shape"; 24 colour = "cyan"; 25 sides = <3>; 26 character = <83>; 27 light-gpios = <&gpio_a 2>, <&gpio_b 6 0>; 28 }; 29 square { 30 compatible = "demo-shape"; 31 colour = "blue"; 32 sides = <4>; 33 }; 34 hexagon { 35 compatible = "demo-simple"; 36 colour = "white"; 37 sides = <6>; 38 }; 39 40 host@0 { 41 #address-cells = <1>; 42 #size-cells = <0>; 43 compatible = "sandbox,host-emulation"; 44 cros-ec@0 { 45 reg = <0>; 46 compatible = "google,cros-ec"; 47 48 /* 49 * This describes the flash memory within the EC. Note 50 * that the STM32L flash erases to 0, not 0xff. 51 */ 52 #address-cells = <1>; 53 #size-cells = <1>; 54 flash@8000000 { 55 reg = <0x08000000 0x20000>; 56 erase-value = <0>; 57 #address-cells = <1>; 58 #size-cells = <1>; 59 60 /* Information for sandbox */ 61 ro { 62 reg = <0 0xf000>; 63 }; 64 wp-ro { 65 reg = <0xf000 0x1000>; 66 }; 67 rw { 68 reg = <0x10000 0x10000>; 69 }; 70 }; 71 }; 72 }; 73 74 lcd { 75 compatible = "sandbox,lcd-sdl"; 76 xres = <800>; 77 yres = <600>; 78 }; 79 80 cros-ec-keyb { 81 compatible = "google,cros-ec-keyb"; 82 keypad,num-rows = <8>; 83 keypad,num-columns = <13>; 84 google,ghost-filter; 85 /* 86 * Keymap entries take the form of 0xRRCCKKKK where 87 * RR=Row CC=Column KKKK=Key Code 88 * The values below are for a US keyboard layout and 89 * are taken from the Linux driver. Note that the 90 * 102ND key is not used for US keyboards. 91 */ 92 linux,keymap = < 93 /* CAPSLCK F1 B F10 */ 94 0x0001003a 0x0002003b 0x00030030 0x00040044 95 /* N = R_ALT ESC */ 96 0x00060031 0x0008000d 0x000a0064 0x01010001 97 /* F4 G F7 H */ 98 0x0102003e 0x01030022 0x01040041 0x01060023 99 /* ' F9 BKSPACE L_CTRL */ 100 0x01080028 0x01090043 0x010b000e 0x0200001d 101 /* TAB F3 T F6 */ 102 0x0201000f 0x0202003d 0x02030014 0x02040040 103 /* ] Y 102ND [ */ 104 0x0205001b 0x02060015 0x02070056 0x0208001a 105 /* F8 GRAVE F2 5 */ 106 0x02090042 0x03010029 0x0302003c 0x03030006 107 /* F5 6 - \ */ 108 0x0304003f 0x03060007 0x0308000c 0x030b002b 109 /* R_CTRL A D F */ 110 0x04000061 0x0401001e 0x04020020 0x04030021 111 /* S K J ; */ 112 0x0404001f 0x04050025 0x04060024 0x04080027 113 /* L ENTER Z C */ 114 0x04090026 0x040b001c 0x0501002c 0x0502002e 115 /* V X , M */ 116 0x0503002f 0x0504002d 0x05050033 0x05060032 117 /* L_SHIFT / . SPACE */ 118 0x0507002a 0x05080035 0x05090034 0x050B0039 119 /* 1 3 4 2 */ 120 0x06010002 0x06020004 0x06030005 0x06040003 121 /* 8 7 0 9 */ 122 0x06050009 0x06060008 0x0608000b 0x0609000a 123 /* L_ALT DOWN RIGHT Q */ 124 0x060a0038 0x060b006c 0x060c006a 0x07010010 125 /* E R W I */ 126 0x07020012 0x07030013 0x07040011 0x07050017 127 /* U R_SHIFT P O */ 128 0x07060016 0x07070036 0x07080019 0x07090018 129 /* UP LEFT */ 130 0x070b0067 0x070c0069>; 131 }; 132 133 gpio_a: gpios@0 { 134 gpio-controller; 135 compatible = "sandbox,gpio"; 136 #gpio-cells = <1>; 137 gpio-bank-name = "a"; 138 num-gpios = <20>; 139 }; 140 141 gpio_b: gpios@1 { 142 gpio-controller; 143 compatible = "sandbox,gpio"; 144 #gpio-cells = <2>; 145 gpio-bank-name = "b"; 146 num-gpios = <10>; 147 }; 148 149 i2c@0 { 150 #address-cells = <1>; 151 #size-cells = <0>; 152 reg = <0 0>; 153 compatible = "sandbox,i2c"; 154 clock-frequency = <400000>; 155 eeprom@2c { 156 reg = <0x2c>; 157 compatible = "i2c-eeprom"; 158 emul { 159 compatible = "sandbox,i2c-eeprom"; 160 sandbox,filename = "i2c.bin"; 161 sandbox,size = <128>; 162 }; 163 }; 164 }; 165 166 spi@0 { 167 #address-cells = <1>; 168 #size-cells = <0>; 169 reg = <0 0>; 170 compatible = "sandbox,spi"; 171 cs-gpios = <0>, <&gpio_a 0>; 172 flash@0 { 173 reg = <0>; 174 compatible = "spansion,m25p16", "sandbox,spi-flash"; 175 spi-max-frequency = <40000000>; 176 sandbox,filename = "spi.bin"; 177 }; 178 }; 179 180 cros-ec@0 { 181 compatible = "google,cros-ec"; 182 #address-cells = <1>; 183 #size-cells = <1>; 184 firmware_storage_spi: flash@0 { 185 reg = <0 0x400000>; 186 }; 187 }; 188 189 pci: pci-controller { 190 compatible = "sandbox,pci"; 191 device_type = "pci"; 192 #address-cells = <3>; 193 #size-cells = <2>; 194 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000 195 0x01000000 0 0x20000000 0x20000000 0 0x2000>; 196 pci@1f,0 { 197 compatible = "pci-generic"; 198 reg = <0xf800 0 0 0 0>; 199 emul@1f,0 { 200 compatible = "sandbox,swap-case"; 201 }; 202 }; 203 }; 204 205 eth@10002000 { 206 compatible = "sandbox,eth"; 207 reg = <0x10002000 0x1000>; 208 fake-host-hwaddr = [00 00 66 44 22 00]; 209 }; 210 211 eth@80000000 { 212 compatible = "sandbox,eth-raw"; 213 reg = <0x80000000 0x1000>; 214 host-raw-interface = "eth0"; 215 }; 216 217 eth@90000000 { 218 compatible = "sandbox,eth-raw"; 219 reg = <0x90000000 0x1000>; 220 host-raw-interface = "lo"; 221 }; 222}; 223