xref: /rk3399_rockchip-uboot/arch/powerpc/include/asm/u-boot.h (revision 660c60c4e70c1f8369e7fc4e23b3bc10e01f1199)
1a47a12beSStefan Roese /*
2a47a12beSStefan Roese  * (C) Copyright 2000 - 2002
3a47a12beSStefan Roese  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4a47a12beSStefan Roese  *
5a47a12beSStefan Roese  * This program is free software; you can redistribute it and/or
6a47a12beSStefan Roese  * modify it under the terms of the GNU General Public License as
7a47a12beSStefan Roese  * published by the Free Software Foundation; either version 2 of
8a47a12beSStefan Roese  * the License, or (at your option) any later version.
9a47a12beSStefan Roese  *
10a47a12beSStefan Roese  * This program is distributed in the hope that it will be useful,
11a47a12beSStefan Roese  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12a47a12beSStefan Roese  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
13a47a12beSStefan Roese  * GNU General Public License for more details.
14a47a12beSStefan Roese  *
15a47a12beSStefan Roese  * You should have received a copy of the GNU General Public License
16a47a12beSStefan Roese  * along with this program; if not, write to the Free Software
17a47a12beSStefan Roese  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18a47a12beSStefan Roese  * MA 02111-1307 USA
19a47a12beSStefan Roese  *
20a47a12beSStefan Roese  ********************************************************************
21a47a12beSStefan Roese  * NOTE: This header file defines an interface to U-Boot. Including
22a47a12beSStefan Roese  * this (unmodified) header file in another file is considered normal
23a47a12beSStefan Roese  * use of U-Boot, and does *not* fall under the heading of "derived
24a47a12beSStefan Roese  * work".
25a47a12beSStefan Roese  ********************************************************************
26a47a12beSStefan Roese  */
27a47a12beSStefan Roese 
28a47a12beSStefan Roese #ifndef __U_BOOT_H__
29a47a12beSStefan Roese #define __U_BOOT_H__
30a47a12beSStefan Roese 
31a47a12beSStefan Roese /*
32a47a12beSStefan Roese  * Board information passed to Linux kernel from U-Boot
33a47a12beSStefan Roese  *
34a47a12beSStefan Roese  * include/asm-ppc/u-boot.h
35a47a12beSStefan Roese  */
36a47a12beSStefan Roese 
37*660c60c4SSimon Glass #ifdef CONFIG_SYS_GENERIC_BOARD
38*660c60c4SSimon Glass /* Use the generic board which requires a unified bd_info */
39*660c60c4SSimon Glass #include <asm-generic/u-boot.h>
40*660c60c4SSimon Glass #else
41*660c60c4SSimon Glass 
42a47a12beSStefan Roese #ifndef __ASSEMBLY__
43a47a12beSStefan Roese 
44a47a12beSStefan Roese typedef struct bd_info {
45a47a12beSStefan Roese 	unsigned long	bi_memstart;	/* start of DRAM memory */
46a47a12beSStefan Roese 	phys_size_t	bi_memsize;	/* size	 of DRAM memory in bytes */
47a47a12beSStefan Roese 	unsigned long	bi_flashstart;	/* start of FLASH memory */
48a47a12beSStefan Roese 	unsigned long	bi_flashsize;	/* size	 of FLASH memory */
49a47a12beSStefan Roese 	unsigned long	bi_flashoffset; /* reserved area for startup monitor */
50a47a12beSStefan Roese 	unsigned long	bi_sramstart;	/* start of SRAM memory */
51a47a12beSStefan Roese 	unsigned long	bi_sramsize;	/* size	 of SRAM memory */
52a47a12beSStefan Roese #if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \
53a47a12beSStefan Roese 	|| defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
54a47a12beSStefan Roese 	unsigned long	bi_immr_base;	/* base of IMMR register */
55a47a12beSStefan Roese #endif
56a47a12beSStefan Roese #if defined(CONFIG_MPC5xxx)
57a47a12beSStefan Roese 	unsigned long	bi_mbar_base;	/* base of internal registers */
58a47a12beSStefan Roese #endif
59a47a12beSStefan Roese #if defined(CONFIG_MPC83xx)
60a47a12beSStefan Roese 	unsigned long	bi_immrbar;
61a47a12beSStefan Roese #endif
62a47a12beSStefan Roese #if defined(CONFIG_MPC8220)
63a47a12beSStefan Roese 	unsigned long	bi_mbar_base;	/* base of internal registers */
64a47a12beSStefan Roese 	unsigned long   bi_inpfreq;     /* Input Freq, In MHz */
65a47a12beSStefan Roese 	unsigned long   bi_pcifreq;     /* PCI Freq, in MHz */
66a47a12beSStefan Roese 	unsigned long   bi_pevfreq;     /* PEV Freq, in MHz */
67a47a12beSStefan Roese 	unsigned long   bi_flbfreq;     /* Flexbus Freq, in MHz */
68a47a12beSStefan Roese 	unsigned long   bi_vcofreq;     /* VCO Freq, in MHz */
69a47a12beSStefan Roese #endif
70d98b0523SPeter Tyser 	unsigned long	bi_bootflags;	/* boot / reboot flag (Unused) */
71e5ab702aSAnatolij Gustschin 	unsigned long	bi_ip_addr;	/* IP Address */
72a47a12beSStefan Roese 	unsigned char	bi_enetaddr[6];	/* OLD: see README.enetaddr */
73a47a12beSStefan Roese 	unsigned short	bi_ethspeed;	/* Ethernet speed in Mbps */
74a47a12beSStefan Roese 	unsigned long	bi_intfreq;	/* Internal Freq, in MHz */
75a47a12beSStefan Roese 	unsigned long	bi_busfreq;	/* Bus Freq, in MHz */
76a47a12beSStefan Roese #if defined(CONFIG_CPM2)
77a47a12beSStefan Roese 	unsigned long	bi_cpmfreq;	/* CPM_CLK Freq, in MHz */
78a47a12beSStefan Roese 	unsigned long	bi_brgfreq;	/* BRG_CLK Freq, in MHz */
79a47a12beSStefan Roese 	unsigned long	bi_sccfreq;	/* SCC_CLK Freq, in MHz */
80a47a12beSStefan Roese 	unsigned long	bi_vco;		/* VCO Out from PLL, in MHz */
81a47a12beSStefan Roese #endif
82a47a12beSStefan Roese #if defined(CONFIG_MPC512X)
83a47a12beSStefan Roese 	unsigned long	bi_ipsfreq;	/* IPS Bus Freq, in MHz */
84a47a12beSStefan Roese #endif /* CONFIG_MPC512X */
85a47a12beSStefan Roese #if defined(CONFIG_MPC5xxx)
86a47a12beSStefan Roese 	unsigned long	bi_ipbfreq;	/* IPB Bus Freq, in MHz */
87a47a12beSStefan Roese 	unsigned long	bi_pcifreq;	/* PCI Bus Freq, in MHz */
88a47a12beSStefan Roese #endif
89a7e5ee9eSSimon Glass 	unsigned int	bi_baudrate;	/* Console Baudrate */
90a47a12beSStefan Roese #if defined(CONFIG_405)   || \
91a47a12beSStefan Roese     defined(CONFIG_405GP) || \
92a47a12beSStefan Roese     defined(CONFIG_405CR) || \
93a47a12beSStefan Roese     defined(CONFIG_405EP) || \
94a47a12beSStefan Roese     defined(CONFIG_405EZ) || \
95a47a12beSStefan Roese     defined(CONFIG_405EX) || \
96a47a12beSStefan Roese     defined(CONFIG_440)
97a47a12beSStefan Roese 	unsigned char	bi_s_version[4];	/* Version of this structure */
98a47a12beSStefan Roese 	unsigned char	bi_r_version[32];	/* Version of the ROM (AMCC) */
99a47a12beSStefan Roese 	unsigned int	bi_procfreq;	/* CPU (Internal) Freq, in Hz */
100a47a12beSStefan Roese 	unsigned int	bi_plb_busfreq;	/* PLB Bus speed, in Hz */
101a47a12beSStefan Roese 	unsigned int	bi_pci_busfreq;	/* PCI Bus speed, in Hz */
102a47a12beSStefan Roese 	unsigned char	bi_pci_enetaddr[6];	/* PCI Ethernet MAC address */
103a47a12beSStefan Roese #endif
104a47a12beSStefan Roese #if defined(CONFIG_HYMOD)
105a47a12beSStefan Roese 	hymod_conf_t	bi_hymod_conf;	/* hymod configuration information */
106a47a12beSStefan Roese #endif
107a47a12beSStefan Roese 
108a47a12beSStefan Roese #ifdef CONFIG_HAS_ETH1
109a47a12beSStefan Roese 	unsigned char   bi_enet1addr[6];	/* OLD: see README.enetaddr */
110a47a12beSStefan Roese #endif
111a47a12beSStefan Roese #ifdef CONFIG_HAS_ETH2
112a47a12beSStefan Roese 	unsigned char	bi_enet2addr[6];	/* OLD: see README.enetaddr */
113a47a12beSStefan Roese #endif
114a47a12beSStefan Roese #ifdef CONFIG_HAS_ETH3
115a47a12beSStefan Roese 	unsigned char   bi_enet3addr[6];	/* OLD: see README.enetaddr */
116a47a12beSStefan Roese #endif
117a47a12beSStefan Roese #ifdef CONFIG_HAS_ETH4
118a47a12beSStefan Roese 	unsigned char   bi_enet4addr[6];	/* OLD: see README.enetaddr */
119a47a12beSStefan Roese #endif
120a47a12beSStefan Roese #ifdef CONFIG_HAS_ETH5
121a47a12beSStefan Roese 	unsigned char   bi_enet5addr[6];	/* OLD: see README.enetaddr */
122a47a12beSStefan Roese #endif
123a47a12beSStefan Roese 
124a47a12beSStefan Roese #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
125a47a12beSStefan Roese     defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
126a47a12beSStefan Roese     defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
127a47a12beSStefan Roese     defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
128a47a12beSStefan Roese     defined(CONFIG_460EX) || defined(CONFIG_460GT)
129a47a12beSStefan Roese 	unsigned int	bi_opbfreq;		/* OPB clock in Hz */
130a47a12beSStefan Roese 	int		bi_iic_fast[2];		/* Use fast i2c mode */
131a47a12beSStefan Roese #endif
132a47a12beSStefan Roese #if defined(CONFIG_NX823)
133a47a12beSStefan Roese 	unsigned char	bi_sernum[8];
134a47a12beSStefan Roese #endif
135a47a12beSStefan Roese #if defined(CONFIG_4xx)
136a47a12beSStefan Roese #if defined(CONFIG_440GX) || \
137a47a12beSStefan Roese     defined(CONFIG_460EX) || defined(CONFIG_460GT)
138a47a12beSStefan Roese 	int		bi_phynum[4];           /* Determines phy mapping */
139a47a12beSStefan Roese 	int		bi_phymode[4];          /* Determines phy mode */
14025fb02abSWeirich, Bernhard #elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
141a47a12beSStefan Roese 	int		bi_phynum[2];           /* Determines phy mapping */
142a47a12beSStefan Roese 	int		bi_phymode[2];          /* Determines phy mode */
143a47a12beSStefan Roese #else
144a47a12beSStefan Roese 	int		bi_phynum[1];           /* Determines phy mapping */
145a47a12beSStefan Roese 	int		bi_phymode[1];          /* Determines phy mode */
146a47a12beSStefan Roese #endif
147a47a12beSStefan Roese #endif /* defined(CONFIG_4xx) */
148a47a12beSStefan Roese } bd_t;
149a47a12beSStefan Roese 
150a47a12beSStefan Roese #endif /* __ASSEMBLY__ */
151476af299SMike Frysinger 
152*660c60c4SSimon Glass #endif /* !CONFIG_SYS_GENERIC_BOARD */
153*660c60c4SSimon Glass 
154476af299SMike Frysinger /* For image.h:image_check_target_arch() */
155476af299SMike Frysinger #define IH_ARCH_DEFAULT IH_ARCH_PPC
156476af299SMike Frysinger 
157a47a12beSStefan Roese #endif	/* __U_BOOT_H__ */
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