xref: /rk3399_rockchip-uboot/arch/powerpc/include/asm/pci_io.h (revision 9d62f20d0861ef87460d073dc189c851715b46ae)
1*a47a12beSStefan Roese /* originally from linux source (asm-ppc/io.h).
2*a47a12beSStefan Roese  * Sanity added by Rob Taylor, Flying Pig Systems, 2000
3*a47a12beSStefan Roese  */
4*a47a12beSStefan Roese #ifndef _PCI_IO_H_
5*a47a12beSStefan Roese #define _PCI_IO_H_
6*a47a12beSStefan Roese 
7*a47a12beSStefan Roese #include "io.h"
8*a47a12beSStefan Roese 
9*a47a12beSStefan Roese 
10*a47a12beSStefan Roese #define pci_read_le16(addr, dest) \
11*a47a12beSStefan Roese     __asm__ __volatile__("lhbrx %0,0,%1" : "=r" (dest) : \
12*a47a12beSStefan Roese 		  "r" (addr), "m" (*addr));
13*a47a12beSStefan Roese 
14*a47a12beSStefan Roese #define pci_write_le16(addr, val) \
15*a47a12beSStefan Roese     __asm__ __volatile__("sthbrx %1,0,%2" : "=m" (*addr) : \
16*a47a12beSStefan Roese 		  "r" (val), "r" (addr));
17*a47a12beSStefan Roese 
18*a47a12beSStefan Roese 
19*a47a12beSStefan Roese #define pci_read_le32(addr, dest) \
20*a47a12beSStefan Roese     __asm__ __volatile__("lwbrx %0,0,%1" : "=r" (dest) : \
21*a47a12beSStefan Roese 		 "r" (addr), "m" (*addr));
22*a47a12beSStefan Roese 
23*a47a12beSStefan Roese #define pci_write_le32(addr, val) \
24*a47a12beSStefan Roese __asm__ __volatile__("stwbrx %1,0,%2" : "=m" (*addr) : \
25*a47a12beSStefan Roese 		 "r" (val), "r" (addr));
26*a47a12beSStefan Roese 
27*a47a12beSStefan Roese #define pci_readb(addr,b) ((b) = *(volatile u8 *) (addr))
28*a47a12beSStefan Roese #define pci_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b))
29*a47a12beSStefan Roese 
30*a47a12beSStefan Roese #if !defined(__BIG_ENDIAN)
31*a47a12beSStefan Roese #define pci_readw(addr,b) ((b) = *(volatile u16 *) (addr))
32*a47a12beSStefan Roese #define pci_readl(addr,b) ((b) = *(volatile u32 *) (addr))
33*a47a12beSStefan Roese #define pci_writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
34*a47a12beSStefan Roese #define pci_writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
35*a47a12beSStefan Roese #else
36*a47a12beSStefan Roese #define pci_readw(addr,b) pci_read_le16((volatile u16 *)(addr),(b))
37*a47a12beSStefan Roese #define pci_readl(addr,b) pci_read_le32((volatile u32 *)(addr),(b))
38*a47a12beSStefan Roese #define pci_writew(b,addr) pci_write_le16((volatile u16 *)(addr),(b))
39*a47a12beSStefan Roese #define pci_writel(b,addr) pci_write_le32((volatile u32 *)(addr),(b))
40*a47a12beSStefan Roese #endif
41*a47a12beSStefan Roese 
42*a47a12beSStefan Roese 
43*a47a12beSStefan Roese #endif /* _PCI_IO_H_ */
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